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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The testbench for t48_core.
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-- The testbench for t48_core.
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--
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--
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-- $Id: tb-c.vhd,v 1.2 2004-04-25 16:23:21 arniml Exp $
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-- $Id: tb-c.vhd,v 1.3 2004-05-21 11:22:44 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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configuration tb_behav_c0 of tb is
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configuration tb_behav_c0 of tb is
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for behav
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for behav
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for rom_4k : syn_rom
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for rom_internal_2k : lpm_rom
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use configuration work.syn_rom_lpm_c0;
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use configuration work.lpm_rom_c0;
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end for;
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for rom_external_2k : lpm_rom
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use configuration work.lpm_rom_c0;
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end for;
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end for;
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for ram_256 : syn_ram
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for ram_256 : syn_ram
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use configuration work.syn_ram_lpm_c0;
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use configuration work.syn_ram_lpm_c0;
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end for;
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end for;
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
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-- File History:
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--
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--
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.2 2004/04/25 16:23:21 arniml
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-- added if_timing
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--
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-- Revision 1.1 2004/03/24 21:42:10 arniml
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-- Revision 1.1 2004/03/24 21:42:10 arniml
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-- initial check-in
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-- initial check-in
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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