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Line 1... |
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The Decoder unit.
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-- The Decoder unit.
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-- It decodes the instruction opcodes and executes them.
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-- It decodes the instruction opcodes and executes them.
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--
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--
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-- $Id: decoder.vhd,v 1.2 2004-03-28 13:06:32 arniml Exp $
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-- $Id: decoder.vhd,v 1.3 2004-03-28 21:15:48 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 98... |
Line 98... |
psw_read_sp_o : out boolean;
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psw_read_sp_o : out boolean;
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psw_write_psw_o : out boolean;
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psw_write_psw_o : out boolean;
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psw_write_sp_o : out boolean;
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psw_write_sp_o : out boolean;
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-- ALU Interface ----------------------------------------------------------
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-- ALU Interface ----------------------------------------------------------
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alu_carry_i : in std_logic;
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alu_carry_i : in std_logic;
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alu_aux_carry_i : in std_logic;
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alu_op_o : out alu_op_t;
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alu_op_o : out alu_op_t;
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alu_use_carry_o : out boolean;
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alu_use_carry_o : out boolean;
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alu_da_low_o : out boolean;
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alu_da_high_o : out boolean;
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alu_p06_temp_reg_o : out boolean;
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alu_p60_temp_reg_o : out boolean;
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alu_da_overflow_i : in boolean;
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-- BUS Interface ----------------------------------------------------------
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-- BUS Interface ----------------------------------------------------------
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bus_output_pcl_o : out boolean;
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bus_output_pcl_o : out boolean;
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bus_bidir_bus_o : out boolean;
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bus_bidir_bus_o : out boolean;
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-- Clock Controller Interface ---------------------------------------------
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-- Clock Controller Interface ---------------------------------------------
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clk_multi_cycle_o : out boolean;
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clk_multi_cycle_o : out boolean;
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| Line 134... |
Line 138... |
pm_write_pmem_addr_o : out boolean;
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pm_write_pmem_addr_o : out boolean;
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pm_addr_type_o : out pmem_addr_ident_t;
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pm_addr_type_o : out pmem_addr_ident_t;
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-- Program Status Word Interface ------------------------------------------
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-- Program Status Word Interface ------------------------------------------
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psw_special_data_o : out std_logic;
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psw_special_data_o : out std_logic;
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psw_carry_i : in std_logic;
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psw_carry_i : in std_logic;
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psw_aux_carry_i : in std_logic;
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psw_f0_i : in std_logic;
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psw_f0_i : in std_logic;
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psw_inc_stackp_o : out boolean;
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psw_inc_stackp_o : out boolean;
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psw_dec_stackp_o : out boolean;
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psw_dec_stackp_o : out boolean;
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psw_write_carry_o : out boolean;
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psw_write_carry_o : out boolean;
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psw_write_aux_carry_o : out boolean;
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psw_write_aux_carry_o : out boolean;
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| Line 366... |
Line 371... |
-- Purpose:
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-- Purpose:
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-- Indentifies each single instruction and steps through the related
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-- Indentifies each single instruction and steps through the related
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-- execution sequence.
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-- execution sequence.
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--
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--
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decode: process (alu_carry_i,
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decode: process (alu_carry_i,
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alu_aux_carry_i,
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psw_aux_carry_i,
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alu_da_overflow_i,
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clk_mstate_i,
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clk_mstate_i,
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clk_second_cycle_i,
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clk_second_cycle_i,
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cnd_take_branch_i,
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cnd_take_branch_i,
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opc_opcode_s,
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opc_opcode_s,
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opc_mnemonic_s,
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opc_mnemonic_s,
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| Line 430... |
Line 436... |
assert_psen_s <= false;
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assert_psen_s <= false;
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stack_high_o <= false;
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stack_high_o <= false;
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alu_write_accu_o <= false;
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alu_write_accu_o <= false;
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alu_write_shadow_o <= false;
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alu_write_shadow_o <= false;
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alu_write_temp_reg_o <= false;
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alu_write_temp_reg_o <= false;
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alu_p06_temp_reg_o <= false;
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alu_p60_temp_reg_o <= false;
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alu_read_alu_o <= false;
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alu_read_alu_o <= false;
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bus_write_bus_o <= false;
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bus_write_bus_o <= false;
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bus_bidir_bus_o <= false;
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bus_bidir_bus_o <= false;
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dm_write_dmem_addr_o <= false;
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dm_write_dmem_addr_o <= false;
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dm_write_dmem_s <= false;
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dm_write_dmem_s <= false;
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| Line 447... |
Line 455... |
psw_read_sp_o <= false;
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psw_read_sp_o <= false;
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psw_write_psw_o <= false;
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psw_write_psw_o <= false;
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psw_write_sp_o <= false;
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psw_write_sp_o <= false;
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alu_op_o <= ALU_NOP;
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alu_op_o <= ALU_NOP;
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alu_use_carry_o <= false;
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alu_use_carry_o <= false;
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alu_da_low_o <= false;
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alu_da_high_o <= false;
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clk_assert_prog_o <= false;
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clk_assert_prog_o <= false;
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clk_assert_rd_o <= false;
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clk_assert_rd_o <= false;
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clk_assert_wr_o <= false;
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clk_assert_wr_o <= false;
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cnd_branch_cond_o <= COND_ON_BIT;
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cnd_branch_cond_o <= COND_ON_BIT;
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cnd_compute_take_o <= false;
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cnd_compute_take_o <= false;
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| Line 523... |
Line 533... |
alu_use_carry_o <= true;
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alu_use_carry_o <= true;
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end if;
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end if;
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psw_special_data_o <= alu_carry_i;
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psw_special_data_o <= alu_carry_i;
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psw_write_carry_o <= true;
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psw_write_carry_o <= true;
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psw_write_aux_carry_o <= true;
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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| Line 549... |
Line 560... |
alu_use_carry_o <= true;
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alu_use_carry_o <= true;
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end if;
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end if;
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psw_special_data_o <= alu_carry_i;
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psw_special_data_o <= alu_carry_i;
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psw_write_carry_o <= true;
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psw_write_carry_o <= true;
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psw_write_aux_carry_o <= true;
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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| Line 787... |
Line 799... |
cpl_f1_s <= true;
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cpl_f1_s <= true;
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end if;
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end if;
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end if;
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end if;
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-- Mnemonic DA ----------------------------------------------------------
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when MN_DA =>
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alu_op_o <= ALU_ADD;
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case clk_mstate_i is
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-- Step 1: Preload Temp Reg with 0x06
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when MSTATE3 =>
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alu_p06_temp_reg_o <= true;
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-- Step 2: Check Auxiliary Carry and overflow on low nibble
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-- Add 0x06 to shadow Accumulator if one is true
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when MSTATE4 =>
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alu_da_low_o <= true;
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if psw_aux_carry_i = '1' or alu_da_overflow_i then
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alu_read_alu_o <= true;
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alu_write_shadow_o <= true;
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end if;
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-- preload Temp Reg with 0x60
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alu_p60_temp_reg_o <= true;
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-- Step 3: Check overflow on high nibble
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-- Add 0x60 to shadow Accumulator if true and store result
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-- in Accumulator and PSW (only Carry)
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when MSTATE5 =>
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alu_da_high_o <= true;
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if alu_da_overflow_i then
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psw_special_data_o <= alu_carry_i;
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else
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alu_op_o <= ALU_NOP;
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psw_special_data_o <= '0';
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end if;
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alu_read_alu_o <= true;
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alu_write_accu_o <= true;
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psw_write_carry_o <= true;
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when others =>
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null;
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end case;
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-- Mnemonic DEC ---------------------------------------------------------
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-- Mnemonic DEC ---------------------------------------------------------
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when MN_DEC =>
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when MN_DEC =>
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case clk_mstate_i is
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case clk_mstate_i is
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when MSTATE4 =>
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when MSTATE4 =>
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-- DEC Rr: store data from RAM to shadow Accumulator
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-- DEC Rr: store data from RAM to shadow Accumulator
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| Line 1757... |
Line 1812... |
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
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-- File History:
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--
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--
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.2 2004/03/28 13:06:32 arniml
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-- implement mnemonics:
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-- + MOVD_A_PP
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-- + OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A
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--
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-- Revision 1.1 2004/03/23 21:31:52 arniml
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-- Revision 1.1 2004/03/23 21:31:52 arniml
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-- initial check-in
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-- initial check-in
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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