Line 1... |
Line 1... |
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The Port 2 unit.
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-- The Port 2 unit.
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-- Implements the Port 2 logic.
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-- Implements the Port 2 logic.
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--
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--
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-- $Id: p2.vhd,v 1.2 2004-03-28 13:11:43 arniml Exp $
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-- $Id: p2.vhd,v 1.3 2004-03-29 19:39:58 arniml Exp $
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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-- modification, are permitted provided that the following conditions are met:
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Line 67... |
Line 67... |
output_pch_i : in boolean;
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output_pch_i : in boolean;
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output_exp_i : in boolean;
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output_exp_i : in boolean;
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pch_i : in nibble_t;
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pch_i : in nibble_t;
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p2_i : in word_t;
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p2_i : in word_t;
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p2_o : out word_t;
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p2_o : out word_t;
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p2_limp_o : out std_logic
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p2_low_imp_o : out std_logic
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);
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);
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end p2;
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end p2;
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Line 87... |
Line 87... |
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-- the port output register
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-- the port output register
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signal p2_q : word_t;
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signal p2_q : word_t;
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-- the low impedance marker
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-- the low impedance marker
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signal limp_q : std_logic;
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signal low_imp_q : std_logic;
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-- the expander register
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-- the expander register
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signal exp_q : nibble_t;
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signal exp_q : nibble_t;
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|
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begin
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begin
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Line 104... |
Line 104... |
--
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--
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p2_regs: process (res_i, clk_i)
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p2_regs: process (res_i, clk_i)
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begin
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begin
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if res_i = res_active_c then
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if res_i = res_active_c then
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p2_q <= (others => '1');
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p2_q <= (others => '1');
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limp_q <= '0';
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low_imp_q <= '0';
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exp_q <= (others => '0');
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exp_q <= (others => '0');
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|
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elsif clk_i'event and clk_i = clk_active_c then
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elsif clk_i'event and clk_i = clk_active_c then
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if en_clk_i then
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if en_clk_i then
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|
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if write_p2_i then
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if write_p2_i then
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p2_q <= data_i;
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p2_q <= data_i;
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limp_q <= '1';
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low_imp_q <= '1';
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else
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else
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limp_q <= '0';
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low_imp_q <= '0';
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end if;
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end if;
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|
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if write_exp_i then
|
if write_exp_i then
|
exp_q <= data_i(exp_q'range);
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exp_q <= data_i(exp_q'range);
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end if;
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end if;
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Line 187... |
Line 187... |
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|
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Output Mapping.
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-- Output Mapping.
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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p2_limp_o <= limp_q;
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p2_low_imp_o <= low_imp_q;
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|
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end rtl;
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end rtl;
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|
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
|
-- File History:
|
--
|
--
|
-- $Log: not supported by cvs2svn $
|
-- $Log: not supported by cvs2svn $
|
|
-- Revision 1.2 2004/03/28 13:11:43 arniml
|
|
-- rework Port 2 expander handling
|
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--
|
-- Revision 1.1 2004/03/23 21:31:53 arniml
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-- Revision 1.1 2004/03/23 21:31:53 arniml
|
-- initial check-in
|
-- initial check-in
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--
|
--
|
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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