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[/] [t48/] [tags/] [rel_0_5_beta/] [rtl/] [vhdl/] [t48_core.vhd] - Diff between revs 4 and 24

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Line 1... Line 1...
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- T48 Microcontroller Core
-- T48 Microcontroller Core
--
--
-- $Id: t48_core.vhd,v 1.1 2004-03-23 21:31:53 arniml Exp $
-- $Id: t48_core.vhd,v 1.2 2004-03-28 13:13:20 arniml Exp $
--
--
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
--
--
-- All rights reserved
-- All rights reserved
--
--
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  -- Port 2 signals
  -- Port 2 signals
  signal p2_write_p2_s   : boolean;
  signal p2_write_p2_s   : boolean;
  signal p2_write_exp_s  : boolean;
  signal p2_write_exp_s  : boolean;
  signal p2_read_p2_s    : boolean;
  signal p2_read_p2_s    : boolean;
  signal p2_read_reg_s   : boolean;
  signal p2_read_reg_s   : boolean;
 
  signal p2_read_exp_s   : boolean;
  signal p2_output_pch_s : boolean;
  signal p2_output_pch_s : boolean;
  signal p2_output_exp_s : boolean;
  signal p2_output_exp_s : boolean;
  signal p2_data_s       : word_t;
  signal p2_data_s       : word_t;
 
 
  -- Program Memory Controller signals
  -- Program Memory Controller signals
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      tim_start_t_o          => tim_start_t_s,
      tim_start_t_o          => tim_start_t_s,
      tim_start_cnt_o        => tim_start_cnt_s,
      tim_start_cnt_o        => tim_start_cnt_s,
      tim_stop_tcnt_o        => tim_stop_tcnt_s,
      tim_stop_tcnt_o        => tim_stop_tcnt_s,
      p1_read_reg_o          => p1_read_reg_s,
      p1_read_reg_o          => p1_read_reg_s,
      p2_read_reg_o          => p2_read_reg_s,
      p2_read_reg_o          => p2_read_reg_s,
 
      p2_read_exp_o          => p2_read_exp_s,
      p2_output_pch_o        => p2_output_pch_s,
      p2_output_pch_o        => p2_output_pch_s,
      p2_output_exp_o        => p2_output_exp_s,
      p2_output_exp_o        => p2_output_exp_s,
      pm_inc_pc_o            => pm_inc_pc_s,
      pm_inc_pc_o            => pm_inc_pc_s,
      pm_write_pmem_addr_o   => pm_write_pmem_addr_s,
      pm_write_pmem_addr_o   => pm_write_pmem_addr_s,
      pm_addr_type_o         => pm_addr_type_s,
      pm_addr_type_o         => pm_addr_type_s,
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        data_o       => p2_data_s,
        data_o       => p2_data_s,
        write_p2_i   => p2_write_p2_s,
        write_p2_i   => p2_write_p2_s,
        write_exp_i  => p2_write_exp_s,
        write_exp_i  => p2_write_exp_s,
        read_p2_i    => p2_read_p2_s,
        read_p2_i    => p2_read_p2_s,
        read_reg_i   => p2_read_reg_s,
        read_reg_i   => p2_read_reg_s,
 
        read_exp_i   => p2_read_exp_s,
        output_pch_i => p2_output_pch_s,
        output_pch_i => p2_output_pch_s,
        output_exp_i => p2_output_exp_s,
        output_exp_i => p2_output_exp_s,
        pch_i        => pmem_addr_s(11 downto 8),
        pch_i        => pmem_addr_s(11 downto 8),
        p2_i         => p2_i,
        p2_i         => p2_i,
        p2_o         => p2_o,
        p2_o         => p2_o,
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.1  2004/03/23 21:31:53  arniml
 
-- initial check-in
--
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
 
 
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