URL
https://opencores.org/ocsvn/t48/t48/trunk
[/] [t48/] [tags/] [rel_0_5_beta/] [sw/] [run_regression.pl] - Diff between revs 61 and 70
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#
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#
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# ############################################################################
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# ############################################################################
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#
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#
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# run_regression.pl
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# run_regression.pl
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#
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#
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# $Id: run_regression.pl,v 1.3 2004-04-16 22:17:08 arniml Exp $
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# $Id: run_regression.pl,v 1.4 2004-04-18 19:02:25 arniml Exp $
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#
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#
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# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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#
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#
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# All rights reserved
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# All rights reserved
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#
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#
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if (chdir($cell_dir)) {
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if (chdir($cell_dir)) {
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print("Processing $cell\n");
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print("Processing $cell\n");
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system('sh', '-c', 'rm -f $SIM_DIR/t48_rom.hex');
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system('sh', '-c', 'rm -f $SIM_DIR/t48_rom.hex');
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system('sh', '-c', 'make -f $VERIF_DIR/include/Makefile.cell clean');
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system('sh', '-c', 'make -f $VERIF_DIR/include/Makefile.cell simu clean');
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system('sh', '-c', 'make -f $VERIF_DIR/include/Makefile.cell simu clean');
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if ($? == 0) {
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if ($? == 0) {
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chdir($ENV{'SIM_DIR'});
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chdir($ENV{'SIM_DIR'});
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system('sh', '-c', 'ls -l t48_rom.hex');
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system('sh', '-c', 'ls -l t48_rom.hex');
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system('sh', '-c', $dump_compare > 0 ? $vhdl_simulator_vcd : $vhdl_simulator);
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system('sh', '-c', $dump_compare > 0 ? $vhdl_simulator_vcd : $vhdl_simulator);
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