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[/] [t48/] [tags/] [rel_0_6_1_beta/] [rtl/] [vhdl/] [pmem_ctrl.vhd] - Diff between revs 4 and 77

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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- The Program Memory control unit.
-- The Program Memory control unit.
-- All operations related to the Program Memory are managed here.
-- All operations related to the Program Memory are managed here.
--
--
-- $Id: pmem_ctrl.vhd,v 1.1 2004-03-23 21:31:53 arniml Exp $
-- $Id: pmem_ctrl.vhd,v 1.2 2004-04-24 23:44:25 arniml Exp $
--
--
-- All rights reserved
-- All rights reserved
--
--
-- Redistribution and use in source and synthezised forms, with or without
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
-- modification, are permitted provided that the following conditions are met:
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end pmem_ctrl;
end pmem_ctrl;
 
 
 
 
library ieee;
library ieee;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;
 
 
use work.pmem_ctrl_pack.all;
use work.pmem_ctrl_pack.all;
use work.t48_pack.res_active_c;
use work.t48_pack.res_active_c;
use work.t48_pack.clk_active_c;
use work.t48_pack.clk_active_c;
use work.t48_pack.bus_idle_level_c;
use work.t48_pack.bus_idle_level_c;
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                      addr_type_i,
                      addr_type_i,
                      pmem_addr_q,
                      pmem_addr_q,
                      data_i)
                      data_i)
  begin
  begin
    -- default assignment
    -- default assignment
    pmem_addr_s <= CONV_STD_LOGIC_VECTOR(program_counter_q,
    pmem_addr_s <= STD_LOGIC_VECTOR(program_counter_q);
                                         pmem_addr_s'length);
 
 
 
    case addr_type_i is
    case addr_type_i is
      when PM_PC =>
      when PM_PC =>
        -- default is ok
        -- default is ok
        null;
        null;
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    data_o <= (others => bus_idle_level_c);
    data_o <= (others => bus_idle_level_c);
 
 
    if read_pmem_i then
    if read_pmem_i then
      data_o <= pmem_data_i;
      data_o <= pmem_data_i;
    elsif read_pcl_i then
    elsif read_pcl_i then
      data_o <= CONV_STD_LOGIC_VECTOR(program_counter_q(data_o'range), data_o'length);
      data_o <= STD_LOGIC_VECTOR(program_counter_q(data_o'range));
    elsif read_pch_i then
    elsif read_pch_i then
      data_o(3 downto 0) <= CONV_STD_LOGIC_VECTOR(program_counter_q(pmem_addr_width_c-1 downto data_o'high+1), 4);
      data_o(3 downto 0) <= STD_LOGIC_VECTOR(program_counter_q(pmem_addr_width_c-1 downto data_o'high+1));
    end if;
    end if;
 
 
  end process data_output;
  end process data_output;
  --
  --
  -----------------------------------------------------------------------------
  -----------------------------------------------------------------------------
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.1  2004/03/23 21:31:53  arniml
 
-- initial check-in
 
--
--
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
 
 
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