OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6__beta/] [sw/] [run_regression.pl] - Diff between revs 35 and 48

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 35 Rev 48
Line 1... Line 1...
#!/usr/bin/perl -w
#!/usr/bin/perl -w
#
#
##############################################################################
# ############################################################################
#
#
# run_regression.pl
# run_regression.pl
#
#
# $Id: run_regression.pl,v 1.1 2004-04-01 20:32:59 arniml Exp $
# $Id: run_regression.pl,v 1.2 2004-04-09 19:17:09 arniml Exp $
#
#
# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
# Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
#
#
# All rights reserved
# All rights reserved
#
#
 
# ############################################################################
 
#
 
# Purpose:
 
# ========
#
#
# Runs regression suite over all testcells found in $VERIF_DIR.
# Runs regression suite over all testcells found in $VERIF_DIR.
#
#
# The testcells are identified by searching for the .asm file(s).
# The testcells are identified by searching for the .asm file(s).
# Each testcell is built by calling the central Makefile.cell.
# Each testcell is built by calling the central Makefile.cell.
# The resulting hex-file is then copied to $SIM_DIR where the VHDL simulator
# The resulting hex-file is then copied to $SIM_DIR where the VHDL simulator
# is started.
# is started.
#
#
##############################################################################
 
 
 
use strict;
use strict;
 
 
my (@asm_files, $asm_file);
my (@asm_files, $asm_file);
my (%cells, $cell, $cell_dir, $tag);
my (%cells, $cell, $cell_dir, $tag);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.