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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The Arithmetic Logic Unit (ALU).
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-- The Arithmetic Logic Unit (ALU).
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-- It contains the ALU core plus the Accumulator and the Temp Reg.
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-- It contains the ALU core plus the Accumulator and the Temp Reg.
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--
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--
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-- $Id: alu.vhd,v 1.7 2004-04-07 22:09:03 arniml Exp $
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-- $Id: alu.vhd,v 1.8 2004-04-24 23:43:56 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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end alu;
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end alu;
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library ieee;
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library ieee;
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use ieee.std_logic_arith.all;
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use ieee.numeric_std.all;
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|
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use work.t48_pack.clk_active_c;
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use work.t48_pack.clk_active_c;
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use work.t48_pack.res_active_c;
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use work.t48_pack.res_active_c;
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use work.t48_pack.bus_idle_level_c;
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use work.t48_pack.bus_idle_level_c;
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use work.t48_pack.nibble_t;
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use work.t48_pack.nibble_t;
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alu_op_i,
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alu_op_i,
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carry_i,
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carry_i,
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use_carry_i)
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use_carry_i)
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|
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variable add_a_v, add_b_v : alu_operand_t;
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variable add_a_v, add_b_v : alu_operand_t;
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variable result_v : alu_operand_t;
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variable c_v : alu_operand_t;
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variable c_v : std_logic;
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variable result_v : UNSIGNED(alu_operand_t'range);
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variable aux_c_v : std_logic_vector(1 downto 0);
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variable aux_c_v : std_logic_vector(1 downto 0);
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|
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begin
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begin
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-- Carry Selection --------------------------------------------------------
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-- Carry Selection --------------------------------------------------------
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if use_carry_i then
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c_v := (others => '0');
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c_v := carry_i;
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if use_carry_i and carry_i = '1' then
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else
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c_v(0) := '1';
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c_v := '0';
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end if;
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end if;
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-- Operand Selection ------------------------------------------------------
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-- Operand Selection ------------------------------------------------------
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-- defaults for ADD
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-- defaults for ADD
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add_a_v := '0' & in_a_s;
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add_a_v := '0' & in_a_s;
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add_b_v := '0' & in_b_s;
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add_b_v := '0' & in_b_s;
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|
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case alu_op_i is
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case alu_op_i is
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when ALU_INC =>
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when ALU_INC =>
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add_b_v := "000000001";
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add_b_v := (others => '0');
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add_b_v(0) := '1';
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when ALU_DEC =>
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when ALU_DEC =>
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add_b_v := "111111111";
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add_b_v := (others => '1');
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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|
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-- The Adder --------------------------------------------------------------
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-- The Adder --------------------------------------------------------------
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result_v := UNSIGNED(add_a_v) +
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result_v := UNSIGNED(add_a_v) +
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UNSIGNED(add_b_v) +
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UNSIGNED(add_b_v) +
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CONV_UNSIGNED(c_v, alu_operand_t'length);
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UNSIGNED(c_v);
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|
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add_result_s <= result_v;
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add_result_s <= std_logic_vector(result_v);
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|
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-- Auxiliary Carry --------------------------------------------------------
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-- Auxiliary Carry --------------------------------------------------------
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aux_c_v := in_a_s(4) & in_b_s(4);
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aux_c_v := in_a_s(4) & in_b_s(4);
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|
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aux_carry_o <= '0';
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aux_carry_o <= '0';
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
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-- File History:
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--
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--
|
-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
|
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-- Revision 1.7 2004/04/07 22:09:03 arniml
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-- remove unused signals
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--
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-- Revision 1.6 2004/04/07 20:56:23 arniml
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-- Revision 1.6 2004/04/07 20:56:23 arniml
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-- default assignment for aux_carry_o
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-- default assignment for aux_carry_o
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--
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--
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-- Revision 1.5 2004/04/06 20:21:53 arniml
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-- Revision 1.5 2004/04/06 20:21:53 arniml
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-- fix sensitivity list
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-- fix sensitivity list
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