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https://opencores.org/ocsvn/t48/t48/trunk
[/] [t48/] [tags/] [rel_0_6_beta/] [rtl/] [vhdl/] [t48_comp_pack-p.vhd] - Diff between revs 28 and 32
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| Rev 28 |
Rev 32 |
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- $Id: t48_comp_pack-p.vhd,v 1.3 2004-03-28 21:27:49 arniml Exp $
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-- $Id: t48_comp_pack-p.vhd,v 1.4 2004-03-29 19:39:58 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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write_p1_i : in boolean;
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write_p1_i : in boolean;
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read_p1_i : in boolean;
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read_p1_i : in boolean;
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read_reg_i : in boolean;
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read_reg_i : in boolean;
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p1_i : in word_t;
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p1_i : in word_t;
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p1_o : out word_t;
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p1_o : out word_t;
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p1_limp_o : out std_logic
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p1_low_imp_o : out std_logic
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);
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);
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end component;
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end component;
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component p2
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component p2
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port (
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port (
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output_pch_i : in boolean;
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output_pch_i : in boolean;
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output_exp_i : in boolean;
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output_exp_i : in boolean;
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pch_i : in nibble_t;
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pch_i : in nibble_t;
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p2_i : in word_t;
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p2_i : in word_t;
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p2_o : out word_t;
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p2_o : out word_t;
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p2_limp_o : out std_logic
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p2_low_imp_o : out std_logic
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);
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);
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end component;
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end component;
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component pmem_ctrl
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component pmem_ctrl
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port (
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port (
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