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README for the T48 uController project
README for the T48 uController project
======================================
======================================
Version: $Date: 2006-07-06 00:08:49 $
Version: $Date: 2006-07-16 01:59:23 $
 
$Name: not supported by cvs2svn $
 
 
 
 
Introduction
Introduction
------------
------------
 
 
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 |
 |
 \--+-- rtl
 \--+-- rtl
    |    |
    |    |
    |    \-- vhdl           : VHDL code containing the RTL description
    |    \-- vhdl           : VHDL code containing the RTL description
    |         |               of the core.
    |         |               of the core.
    |         \-- system    : RTL VHDL code of sample systems.
    |         +-- system    : RTL VHDL code of sample systems.
 
    |         |
 
    |         \-- t8243     : RTL VHDL code of 8243 core.
    |
    |
    +-- bench
    +-- bench
    |    |
    |    |
    |    \-- vhdl           : VHDL testbench code.
    |    \-- vhdl           : VHDL testbench code.
    |
    |
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    The testbench for the t8048 sample system.
    The testbench for the t8048 sample system.
 
 
  * tb_t8039_behav_c0
  * tb_t8039_behav_c0
    The testbench for the 8039 sample system.
    The testbench for the 8039 sample system.
 
 
 
  * tb_t8243_behav_c0
 
    Testbench containing the t48_core and the synchronous t8243 flavour.
 
 
 
  * tb_t8048_t8243_behav_c0
 
    Testbench containing the t8048 and the asynchronous t8243 toplevel.
 
 
Each Makefile has a 'clean' target to delete all intermediate data:
Each Makefile has a 'clean' target to delete all intermediate data:
 
 
$ make -f Makefile. clean
$ make -f Makefile. clean
 
 
The basic simple sequence list can be found in COMPILE_LIST. This can be
The basic simple sequence list can be found in COMPILE_LIST. This can be
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VHDL code of the ROM model lpm_rom.vhd. In case they are missing, the
VHDL code of the ROM model lpm_rom.vhd. In case they are missing, the
simulation will stop immediately after elaborating the design.
simulation will stop immediately after elaborating the design.
 
 
These files are:
These files are:
 
 
  * t48_rom.hex
  * rom_t49.hex
    Internal ROM contents at address range 000H to 7FFH.
    Internal ROM contents for 8x49 derivatives,
 
    address range 000H to 7FFH.
 
    Intel hex format, starting at address 000H.
 
 
 
  * rom_t49_ext.hex
 
    External ROM contents for t8x49 derivatives,
 
    address range 800H to FFFH.
 
    Intel hex format, starting at address 800H.
 
 
 
  * rom_t48.hex
 
    Internal ROM contents for t8x48 derivatives,
 
    address range 000H to 3FFH.
 
    Intel hex format, starting at address 000H.
 
 
 
  * rom_t48_ext.hex
 
    External ROM contents for t8x48 derivatives,
 
    address range 400H to FFFH.
    Intel hex format, starting at address 000H.
    Intel hex format, starting at address 000H.
 
 
  * t48_ext_rom.hex
  * rom_t3x.hex
    External ROM contents at address range 800H to FFFH.
    Internal ROM contents for t803x derivatives,
 
    empty.
 
 
 
  * rom_t3x_ext.hex
 
    External ROM contents for t803x derivatives,
 
    address range 000H to FFFH.
    Intel hex format, starting at address 000H.
    Intel hex format, starting at address 000H.
 
 
The verification flow for the T48 project generates these two files
The verification flow for the T48 project generates these files
automatically from the assembler source files.
automatically from the assembler source files.
 
 
All regression tests and the general purpose software is organized in a cell
All regression tests and the general purpose software is organized in a cell
structure. Currently, this means that the software for a cell is contained in
structure. Currently, this means that the software for a cell is contained in
a dedicated directory where the assembler run takes place. In the future,
a dedicated directory where the assembler run takes place. In the future,

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