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[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [clock_ctrl.vhd] - Diff between revs 20 and 63

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Rev 20 Rev 63
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- The Clock Control unit.
-- The Clock Control unit.
-- Clock States and Machine Cycles are generated here.
-- Clock States and Machine Cycles are generated here.
--
--
-- $Id: clock_ctrl.vhd,v 1.2 2004-03-28 12:55:06 arniml Exp $
-- $Id: clock_ctrl.vhd,v 1.3 2004-04-18 18:56:23 arniml Exp $
--
--
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
--
--
-- All rights reserved
-- All rights reserved
--
--
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  --   The Clock State controller.
  --   The Clock State controller.
  --
  --
  states: process (res_i, clk_i)
  states: process (res_i, clk_i)
  begin
  begin
    if res_i = res_active_c then
    if res_i = res_active_c then
      mstate_q <= MSTATE1;
      -- Reset machine state to MSTATE3
 
      -- This allows a proper instruction fetch for the first real instruction
 
      -- after reset.
 
      -- The MSTATE3 is part of a virtual NOP that has no MSTATE1 and MSTATE2.
 
      mstate_q <= MSTATE3;
 
 
    elsif clk_i'event and clk_i = clk_active_c then
    elsif clk_i'event and clk_i = clk_active_c then
      if en_clk_i then
      if en_clk_i then
 
 
        case mstate_q is
        case mstate_q is
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          second_cycle_q <= true;
          second_cycle_q <= true;
        end if;
        end if;
 
 
        -- reset at end of second machine cycle
        -- reset at end of second machine cycle
        if state5_v and
        if state5_v and
          (not multi_cycle_q or
           (multi_cycle_q and second_cycle_q) then
           (multi_cycle_q and second_cycle_q)) then
 
          multi_cycle_q  <= false;
          multi_cycle_q  <= false;
          second_cycle_q <= false;
          second_cycle_q <= false;
        end if;
        end if;
 
 
      end if;
      end if;
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.2  2004/03/28 12:55:06  arniml
 
-- move code for PROG out of if-branch for xtal3_s
 
--
-- Revision 1.1  2004/03/23 21:31:52  arniml
-- Revision 1.1  2004/03/23 21:31:52  arniml
-- initial check-in
-- initial check-in
--
--
--
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------

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