OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [decoder.vhd] - Diff between revs 179 and 188

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 179 Rev 188
Line 1... Line 1...
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- The Decoder unit.
-- The Decoder unit.
-- It decodes the instruction opcodes and executes them.
-- It decodes the instruction opcodes and executes them.
--
--
-- $Id: decoder.vhd,v 1.19 2005-06-11 10:08:43 arniml Exp $
-- $Id: decoder.vhd,v 1.20 2005-09-13 21:08:34 arniml Exp $
--
--
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
--
--
-- All rights reserved
-- All rights reserved
--
--
Line 321... Line 321...
    need_address_v    := not clk_second_cycle_i or
    need_address_v    := not clk_second_cycle_i or
                         (clk_second_cycle_i and assert_psen_s);
                         (clk_second_cycle_i and assert_psen_s);
 
 
    case clk_mstate_i is
    case clk_mstate_i is
      when MSTATE1 =>
      when MSTATE1 =>
        if need_address_v and not int_pending_s then
        if need_address_v then
          if ea_i = '0' then
          if ea_i = '0' then
 
            if not int_pending_s then
            pm_read_pmem_o  <= true;
            pm_read_pmem_o  <= true;
 
            end if;
 
 
          else
          else
            bus_read_bus_s  <= true;
            bus_read_bus_s  <= true;
            p2_output_pch_o <= true;
            p2_output_pch_o <= true;
          end if;
          end if;
 
 
        end if;
        end if;
 
 
        if not clk_second_cycle_i then
        if not clk_second_cycle_i then
          if not int_pending_s then
          if not int_pending_s then
            opc_read_bus_s  <= true;
            opc_read_bus_s  <= true;
Line 1950... Line 1954...
 
 
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.19  2005/06/11 10:08:43  arniml
 
-- introduce prefix 't48_' for all packages, entities and configurations
 
--
-- Revision 1.18  2005/06/09 22:18:28  arniml
-- Revision 1.18  2005/06/09 22:18:28  arniml
-- Move latching of BUS to MSTATE2
-- Move latching of BUS to MSTATE2
--   -> sample BUS at the end of RD'
--   -> sample BUS at the end of RD'
--
--
-- Revision 1.17  2005/05/09 22:26:08  arniml
-- Revision 1.17  2005/05/09 22:26:08  arniml

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.