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Line 1... |
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The testbench for t8039.
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-- The testbench for t8039.
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--
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--
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-- $Id: tb_t8039.vhd,v 1.4 2006-06-22 00:21:58 arniml Exp $
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-- $Id: tb_t8039.vhd,v 1.5 2008-04-28 22:13:33 arniml Exp $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 85... |
Line 85... |
signal int_n_s : std_logic;
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signal int_n_s : std_logic;
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signal ale_s : std_logic;
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signal ale_s : std_logic;
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signal psen_n_s : std_logic;
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signal psen_n_s : std_logic;
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signal prog_n_s : std_logic;
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signal prog_n_s : std_logic;
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|
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signal t0_b : std_logic;
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|
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signal p1_b : std_logic_vector( 7 downto 0);
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signal p1_b : std_logic_vector( 7 downto 0);
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signal p2_b : std_logic_vector( 7 downto 0);
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signal p2_b : std_logic_vector( 7 downto 0);
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|
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signal db_b : std_logic_vector( 7 downto 0);
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signal db_b : std_logic_vector( 7 downto 0);
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signal ext_mem_addr_s : std_logic_vector(11 downto 0);
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signal ext_mem_addr_s : std_logic_vector(11 downto 0);
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Line 150... |
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t8039_b : t8039
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t8039_b : t8039
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port map (
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port map (
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xtal_i => xtal_s,
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xtal_i => xtal_s,
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reset_n_i => res_n_s,
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reset_n_i => res_n_s,
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t0_b => p1_b(0),
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t0_b => t0_b,
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int_n_i => int_n_s,
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int_n_i => int_n_s,
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ea_i => one_s,
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ea_i => one_s,
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rd_n_o => rd_n_s,
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rd_n_o => rd_n_s,
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psen_n_o => psen_n_s,
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psen_n_o => psen_n_s,
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wr_n_o => wr_n_s,
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wr_n_o => wr_n_s,
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Line 207... |
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end process ext_mem;
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end process ext_mem;
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--
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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t0_b <= p1_b(0);
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|
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- The clock generator
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-- The clock generator
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--
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--
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clk_gen: process
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clk_gen: process
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begin
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begin
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| Line 292... |
Line 296... |
|
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
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-- File History:
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--
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--
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.4 2006/06/22 00:21:58 arniml
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-- cleanup & enhance external access
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--
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-- Revision 1.3 2006/06/21 01:04:05 arniml
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-- Revision 1.3 2006/06/21 01:04:05 arniml
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-- replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom
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-- replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom
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--
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--
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-- Revision 1.2 2005/11/01 21:22:28 arniml
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-- Revision 1.2 2005/11/01 21:22:28 arniml
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-- fix address assignment
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-- fix address assignment
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