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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- The testbench for t48_core.
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-- The testbench for t48_core.
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--
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--
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-- $Id: tb.vhd,v 1.14 2006-06-21 01:04:05 arniml Exp $
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-- $Id: tb.vhd 295 2009-04-01 19:32:48Z arniml $
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--
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--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 558... |
Line 558... |
--
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--
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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end behav;
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end behav;
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-------------------------------------------------------------------------------
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-- File History:
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--
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-- $Log: not supported by cvs2svn $
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-- Revision 1.13 2006/06/20 00:45:26 arniml
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-- new input xtal_en_i
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--
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-- Revision 1.12 2005/11/01 21:21:48 arniml
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-- split low impedance markers for P2
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--
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-- Revision 1.11 2005/09/07 17:39:40 arniml
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-- fix missing assignment to outclock
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--
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-- Revision 1.10 2004/05/21 11:24:47 arniml
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-- split 4k internal ROM into
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-- + 2k internal ROM
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-- + 2k external ROM
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-- EA of t48_core is driven by MSB of internal ROM address
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-- if upper 2k block is selected, the system switches to EA mode on the fly
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--
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-- Revision 1.9 2004/05/17 14:43:33 arniml
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-- add testbench peripherals for P1 and P2
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-- this became necessary to observe a difference between externally applied
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-- port data and internally applied port data
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--
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-- Revision 1.8 2004/04/25 20:41:48 arniml
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-- connect if_timing to P2 output of T48
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--
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-- Revision 1.7 2004/04/25 16:23:21 arniml
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-- added if_timing
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--
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-- Revision 1.6 2004/04/14 20:57:44 arniml
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-- wait for instruction strobe after final end-of-simulation detection
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-- this ensures that the last mov instruction is part of the dump and
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-- enables 100% matching with i8039 simulator
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--
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-- Revision 1.5 2004/03/29 19:45:15 arniml
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-- rename pX_limp to pX_low_imp
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--
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-- Revision 1.4 2004/03/28 21:30:25 arniml
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-- connect prog_n_o
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--
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-- Revision 1.3 2004/03/26 22:39:28 arniml
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-- enhance simulation result string
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--
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-- Revision 1.2 2004/03/24 23:22:35 arniml
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-- put ext_ram on falling clock edge to sample the write enable properly
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--
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-- Revision 1.1 2004/03/24 21:42:10 arniml
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-- initial check-in
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--
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-------------------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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