URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] [sim/] [rtl_sim/] [Makefile.hier] - Diff between revs 259 and 283

Rev 259	Rev 283
Line 108...	Line 108...
`$(t48_comp_pack) \`	`$(t48_comp_pack) \`
`$(t48_tb_pack) \`	`$(t48_tb_pack) \`
`$(decoder_pack)`	`$(decoder_pack)`
`$(ANALYZE) $<`	`$(ANALYZE) $<`

`$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd`	`$(decoder_pack) : $(RTL_DIR)/decoder_pack-p.vhd \`
	`$(t48_pack)`
`$(ANALYZE) $<`	`$(ANALYZE) $<`

`$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \`	`$(decoder_rtl_c0) : $(RTL_DIR)/decoder-c.vhd \`
`$(opc_decoder_rtl_c0) \`
`$(int_rtl_c0) \`	`$(int_rtl_c0) \`
`$(decoder)`	`$(decoder)`
`$(ANALYZE) $<`	`$(ANALYZE) $<`

`$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \`	`$(dmem_ctrl) : $(RTL_DIR)/dmem_ctrl.vhd \`
Line 137...	Line 137...

`$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \`	`$(int_rtl_c0) : $(RTL_DIR)/int-c.vhd \`
`$(int)`	`$(int)`
`$(ANALYZE) $<`	`$(ANALYZE) $<`

`$(opc_decoder) : $(RTL_DIR)/opc_decoder.vhd \`
`$(decoder_pack) \`
`$(t48_pack) \`
`$(pmem_ctrl_pack) \`
`$(dmem_ctrl_pack) \`
`$(cond_branch_pack) \`
`$(alu_pack) \`
`$(t48_comp_pack)`
`$(ANALYZE) $<`

`$(opc_decoder_rtl_c0) : $(RTL_DIR)/opc_decoder-c.vhd \`
`$(opc_table_rtl_c0) \`
`$(opc_decoder)`
`$(ANALYZE) $<`

`$(opc_table) : $(RTL_DIR)/opc_table.vhd \`
`$(decoder_pack) \`
`$(t48_pack)`
`$(ANALYZE) $<`

`$(opc_table_rtl_c0) : $(RTL_DIR)/opc_table-c.vhd \`
`$(opc_table)`
`$(ANALYZE) $<`

`$(p1) : $(RTL_DIR)/p1.vhd \`	`$(p1) : $(RTL_DIR)/p1.vhd \`
`$(t48_pack)`	`$(t48_pack)`
`$(ANALYZE) $<`	`$(ANALYZE) $<`

`$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \`	`$(p1_rtl_c0) : $(RTL_DIR)/p1-c.vhd \`