URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_3/] [sw/] [verif/] [black_box/] [psw/] [test.asm] - Diff between revs 12 and 34

Rev 12	Rev 34
Line 1...	Line 1...
`;; *******************************************************************`	`;; *******************************************************************`
`;; $Id: test.asm,v 1.1.1.1 2004-03-25 22:29:17 arniml Exp $`	`;; $Id: test.asm,v 1.2 2004-03-29 20:09:50 arniml Exp $`
`;;`	`;;`
`;; Test several commands related to PSW.`	`;; Test several commands related to PSW.`
`;; *******************************************************************`	`;; *******************************************************************`

`INCLUDE "cpu.inc"`	`INCLUDE "cpu.inc"`
Line 27...	Line 27...

`cpl f0`	`cpl f0`
`jf0 ok_1`	`jf0 ok_1`
`jmp fail`	`jmp fail`
`ok_1: mov a, psw`	`ok_1: mov a, psw`
	`anl a, #~040H ; mask AC, tested separately with DA`
`add a, #(~028H + 1) & 0FFH`	`add a, #(~028H + 1) & 0FFH`
`jnz fail`	`jnz fail`

`clr f0`	`clr f0`
`jnc fail`	`jnc fail`
`mov a, psw`	`mov a, psw`
	`anl a, #~040H ; mask AC, tested separately with DA`
`add a, #(~088H + 1) & 0FFH`	`add a, #(~088H + 1) & 0FFH`
`jnz fail`	`jnz fail`

`clr c`	`clr c`
`jc fail`	`jc fail`
`sel rb1`	`sel rb1`
`mov a, psw`	`mov a, psw`
	`anl a, #~040H ; mask AC, tested separately with DA`
`add a, #(~018H + 1) & 0FFH`	`add a, #(~018H + 1) & 0FFH`
`jnz fail`	`jnz fail`

`cpl c`	`cpl c`
`jc fail`	`jc fail`
`sel rb0`	`sel rb0`
`mov a, psw`	`mov a, psw`
	`anl a, #~040H ; mask AC, tested separately with DA`
`add a, #(~08H + 1) & 0FFH`	`add a, #(~08H + 1) & 0FFH`
`jnz fail`	`jnz fail`

`pass: PASS`	`pass: PASS`