| Line 5... |
Line 5... |
unit alu_chk_u {
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unit alu_chk_u {
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reg_a : byte;
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reg_a : byte;
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reg_x : byte;
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reg_x : byte;
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reg_y : byte;
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reg_y : byte;
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reg_status : byte;
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reg_status : byte;
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reg_result : byte;
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inst : alu_input_s;
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inst : alu_input_s;
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next_inst : alu_input_s;
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next_inst : alu_input_s;
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count_cycles : int;
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count_cycles : int;
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| Line 43... |
Line 44... |
first_cycle = FALSE;
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first_cycle = FALSE;
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reg_x = alu_x;
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reg_x = alu_x;
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reg_y = alu_y;
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reg_y = alu_y;
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reg_status = alu_status;
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reg_status = alu_status;
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reg_a = 0; // TODO: check this
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reg_a = 0; // TODO: check this
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reg_result = 0;
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}
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}
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else {
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else {
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out ("CYCLE ", count_cycles, " COMPARE:");
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out ("CYCLE ", count_cycles, " COMPARE:");
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print inst;
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print inst;
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case inst.input_kind {
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case inst.input_kind {
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ENABLED_VALID: {
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ENABLED_VALID: {
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| Line 63... |
Line 64... |
dut_error("error at e code");
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dut_error("error at e code");
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};
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};
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};
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};
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// here i have already calculated. must compare!
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// here i have already calculated. must compare!
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if (reg_a != alu_result) {
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if (reg_result != alu_result) {
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print reg_a;
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print inst;
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print me;
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print alu_result;
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print alu_result;
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print alu_status;
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print alu_x;
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print alu_y;
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dut_error("WRONG!");
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dut_error("WRONG!");
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};
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};
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if (reg_x != alu_x) {
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if (reg_x != alu_x) {
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dut_error("WRONG!");
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dut_error("WRONG!");
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| Line 103... |
Line 109... |
AND_ABX: { exec_and(); };
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AND_ABX: { exec_and(); };
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AND_ABY: { exec_and(); };
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AND_ABY: { exec_and(); };
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AND_IDX: { exec_and(); };
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AND_IDX: { exec_and(); };
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AND_IDY: { exec_and(); };
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AND_IDY: { exec_and(); };
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ASL_ACC: { exec_asl_acc(); }; // A,Z,C,N = M*2
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ASL_ZPG: { exec_asl_mem(); }; // M,Z,C,N = M*2
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ASL_ZPX: { exec_asl_mem(); };
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ASL_ABS: { exec_asl_mem(); };
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ASL_ABX: { exec_asl_mem(); };
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default: {
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default: {
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//dut_error("unknown opcode");
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//dut_error("unknown opcode");
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}
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}
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};
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};
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};
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};
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exec_asl_acc() is {
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reg_status[0:0] = reg_a[7:7];
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reg_a = reg_a * 2;
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update_z(reg_a);
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update_n(reg_a);
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reg_result = reg_a;
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};
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exec_asl_mem() is {
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reg_status[0:0] = inst.alu_a[7:7];
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reg_result = inst.alu_a * 2;
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update_z(reg_result);
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update_n(reg_result);
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};
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exec_and() is {
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exec_and() is {
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reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
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reg_a = reg_a & inst.alu_a; // TODO: this is probably wrong
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update_z(reg_a);
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update_z(reg_a);
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update_n(reg_a);
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update_n(reg_a);
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reg_result = reg_a;
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};
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};
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exec_sum() is {
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exec_sum() is {
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update_c(reg_a, inst.alu_a);
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update_c(reg_a, inst.alu_a);
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reg_a = reg_a + inst.alu_a;
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reg_a = reg_a + inst.alu_a;
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update_z(reg_a);
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update_z(reg_a);
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update_n(reg_a);
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update_n(reg_a);
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reg_result = reg_a;
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print me;
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//print me;
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//dut_error();
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//dut_error();
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};
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};
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update_z(arg : byte) is {
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update_z(arg : byte) is {
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if (arg == 0) {
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if (arg == 0) {
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