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<'
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<'
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import fsm_components.e;
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import fsm_components.e;
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type fsm_input_t :
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type fsm_input_t : [ RESET, INSTRUCTIONS ];
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[ RESET, INSTRUCTIONS ];
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'>
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BRK, RTI, RTS, PHA_PHP, PLA_PLP, JSR,
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ACCUMULATOR_OR_IMPLIED, IMMEDIATE, JMP,
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ABSOLUTE_READ_INSTRUCTIONS,
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ABSOLUTE_READ_MODIFY_WRITE,
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ABSOLUTE_WRITE_INSTRUCTIONS,
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ZERO_PAGE_READ_INSTRUCTIONS,
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ZERO_PAGE_READ_MODIFY_WRITE,
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ZERO_PAGE_WRITE_INSTRUCTIONS,
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ZERO_PAGE_INDEXED_READ_INSTRUCTIONS,
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ZERO_PAGE_INDEXED_READ_MODIFY_WRITE,
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ZERO_PAGE_INDEXED_WRITE_INSTRUCTIONS,
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ABSOLUTE_INDEXED_READ_INSTRUCTIONS,
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ABSOLUTE_INDEXED_READ_MODIFY_WRITE,
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ABSOLUTE_INDEXED_WRITE_INSTRUCTIONS,
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REL,
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INDEXED_INDIRECT_READ_INSTRUCTIONS,
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INDEXED_INDIRECT_READ_MODIFY_WRITE,
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INDEXED_INDIRECT_WRITE_INSTRUCTIONS,
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INDIRECT_INDEXED_READ_INSTRUCTIONS,
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INDIRECT_INDEXED_READ_MODIFY_WRITE,
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INDIRECT_INDEXED_WRITE_INSTRUCTIONS,
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ABSOLUTE_INDIRECT,
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ALU
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<'
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--type fsm_test_type: [REGULAR, RAND];
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struct fsm_input_s {
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struct fsm_input_s {
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input_kind : fsm_input_t;
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input_kind : fsm_input_t;
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--n_cycles : int;
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-- test_kind : fsm_test_type;
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reset_n : bit;
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reset_n : bit;
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alu_result : byte;
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alu_result : byte;
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alu_status : byte;
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alu_status : byte;
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data_in : byte;
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data_in : byte;
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alu_x : byte;
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alu_x : byte;
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alu_y : byte;
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alu_y : byte;
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// when RESET'input_kind fsm_input_s {
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keep soft input_kind == select {
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// keep reset_n == 0;
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99: INSTRUCTIONS;
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// --keep n_cycles == 7;
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1 : RESET;
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// };
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// when BRK'input_kind fsm_input_s {
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// keep reset_n == 1;
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// keep n_cycles == 7;
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// keep data_in == 8'h;
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// };
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// when RTI'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when RTS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when PHA_PHP'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when PLA_PLP'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when JSR'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ACCUMULATOR_OR_IMPLIED'input_kind fsm_input_s {
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// keep reset_n == 1;
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// keep data_in ==
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// };
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// when IMMEDIATE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when JMP'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_INDEXED_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_INDEXED_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ZERO_PAGE_INDEXED_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_INDEXED_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_INDEXED_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_INDEXED_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when REL'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDEXED_INDIRECT_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDEXED_INDIRECT_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDEXED_INDIRECT_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDIRECT_INDEXED_READ_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDIRECT_INDEXED_READ_MODIFY_WRITE'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when INDIRECT_INDEXED_WRITE_INSTRUCTIONS'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ABSOLUTE_INDIRECT'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when ALU'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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// when 'input_kind fsm_input_s {
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// keep reset_n == 1;
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// };
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-- when REGULAR'test_kind alu_input_s {
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-- keep soft input_kind == select {
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-- 45: ENABLED_VALID;
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-- 45: DISABLED_VALID;
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-- 10: RESET;
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-- };
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-- };
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-- when ENABLED_VALID'input_kind alu_input_s {
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-- keep reset_n == TRUE; // remember this is active low
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-- keep alu_enable == TRUE;
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-- keep alu_a in [0..255];
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-- };
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-- when DISABLED_VALID'input_kind alu_input_s {
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-- keep reset_n == TRUE; // remember this is active low
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-- keep alu_enable == FALSE;
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-- keep alu_a in [0..255];
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-- };
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keep soft input_kind == select {
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99: INSTRUCTIONS;
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1 : RESET;
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};
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when RESET'input_kind fsm_input_s {
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keep reset_n == 0;
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};
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};
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when INSTRUCTIONS'input_kind fsm_input_s {
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when RESET'input_kind fsm_input_s {
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keep reset_n == 1;
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keep reset_n == 0;
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};
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};
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-- event T1_cover_event;
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when INSTRUCTIONS'input_kind fsm_input_s {
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-- cover T1_cover_event is {
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keep reset_n == 1;
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-- item input_kind using no_collect=TRUE, ignore = (input_kind == ENABLED_RAND || input_kind == DISABLED_RAND);
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};
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-- item alu_opcode using num_of_buckets=256, radix=HEX, no_collect=TRUE;
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-- cross input_kind, alu_opcode;
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-- //item alu_a;
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-- };
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};
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--extend fsm_input_s {
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-- event T1_cover_event;
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-- rand_op : byte;
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-- cover T1_cover_event is {
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--
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-- item input_kind using no_collect=TRUE, ignore = (input_kind == ENABLED_RAND || input_kind == DISABLED_RAND);
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-- when RAND'test_kind alu_input_s {
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-- item alu_opcode using num_of_buckets=256, radix=HEX, no_collect=TRUE;
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-- keep soft input_kind == select {
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-- cross input_kind, alu_opcode;
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-- 45: ENABLED_RAND;
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-- //item alu_a;
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-- 45: DISABLED_RAND;
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-- };
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-- 10: RESET;
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};
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-- };
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-- };
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'>
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--
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-- when ENABLED_RAND'input_kind alu_input_s {
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-- keep reset_n == TRUE; // remember this is active low
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-- keep alu_enable == TRUE;
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-- keep alu_a in [0..255];
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-- keep rand_op in [0..255];
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-- };
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--
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-- when DISABLED_RAND'input_kind alu_input_s {
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-- keep reset_n == TRUE; // remember this is active low
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-- keep alu_enable == FALSE;
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-- keep alu_a in [0..255];
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-- keep rand_op in [0..255];
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-- };
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--
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-- event T2_cover_event;
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-- cover T2_cover_event is {
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-- item alu_enable using no_collect=TRUE;
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-- item rand_op using num_of_buckets=256, radix=HEX, no_collect=TRUE;
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-- cross alu_enable, rand_op;
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-- };
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--};
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'>
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