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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu.v] - Diff between revs 141 and 142

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Rev 141 Rev 142
Line 184... Line 184...
        bcd1      = A;
        bcd1      = A;
        bcd2      = alu_a;
        bcd2      = alu_a;
        result    = alu_result;
        result    = alu_result;
        STATUS[C] = alu_status[C];
        STATUS[C] = alu_status[C];
        STATUS[V] = alu_status[V];
        STATUS[V] = alu_status[V];
        STATUS[Z] = (result == 0) ? 1 : 0;
 
        STATUS[N] = result[7];
 
        STATUS[5] = 1;
        STATUS[5] = 1;
        STATUS[B] = alu_status[B];
        STATUS[B] = alu_status[B];
        STATUS[I] = alu_status[I];
        STATUS[I] = alu_status[I];
        STATUS[D] = alu_status[D];
        STATUS[D] = alu_status[D];
 
 
Line 436... Line 434...
                end
                end
 
 
                default: begin // NON-DEFAULT OPCODES FALL HERE
                default: begin // NON-DEFAULT OPCODES FALL HERE
                end
                end
        endcase
        endcase
 
        STATUS[Z] = (result == 0) ? 1 : 0;
 
        STATUS[N] = result[7];
end
end
 
 
endmodule
endmodule
 
 
 
 
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