URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu.v] - Diff between revs 167 and 168

Rev 167	Rev 168
Line 162...	Line 162...
`end`	`end`
`BRK_IMP :`	`BRK_IMP :`
`begin`	`begin`
`alu_status[B] <= 1;`	`alu_status[B] <= 1;`
`end`	`end`
`PLP_IMP, RTI_IMP :`	`PLP_IMP : //, RTI_IMP :`
`begin`	`begin`
`alu_status[C] <= alu_a[C];`	`alu_status[C] <= alu_a[C];`
`alu_status[Z] <= alu_a[Z];`	`alu_status[Z] <= alu_a[Z];`
`alu_status[I] <= alu_a[I];`	`alu_status[I] <= alu_a[I];`
`alu_status[D] <= alu_a[D];`	`alu_status[D] <= alu_a[D];`
Line 245...	Line 245...
`//NOP_IMP: begin`	`//NOP_IMP: begin`
`// Do nothing :-D`	`// Do nothing :-D`
`//end`	`//end`

`// PLP - Pull Processor Status Register`	`// PLP - Pull Processor Status Register`
`PLP_IMP, RTI_IMP: begin`	`PLP_IMP : begin //, RTI_IMP: begin`
`STATUS = alu_a;`	`STATUS = alu_a;`
`end`	`end`

`PLA_IMP : begin`	`PLA_IMP : begin`
`result = alu_a;`	`result = alu_a;`