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https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_alu_wrapper.v] - Diff between revs 144 and 153
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| Rev 144 |
Rev 153 |
| Line 63... |
Line 63... |
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initial clk = 0;
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initial clk = 0;
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always #10 clk <= ~clk;
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always #10 clk <= ~clk;
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always @(posedge clk) begin
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always @(posedge clk) begin
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$display("reset is %b", reset_n);
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//$display("reset is %b", reset_n);
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$display("alu_enable is %b", alu_enable);
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//$display("alu_enable is %b", alu_enable);
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$display("alu_opcode is %h", alu_opcode);
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//$display("alu_opcode is %h", alu_opcode);
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$display("alu_a is %d", alu_a);
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//$display("alu_a is %d", alu_a);
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end
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end
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t6507lp_alu t6507lp_alu (
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t6507lp_alu t6507lp_alu (
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.clk (clk),
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.clk (clk),
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.reset_n (reset_n),
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.reset_n (reset_n),
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