| Line 99... |
Line 99... |
localparam PULL_REGISTER = 5'b11011;
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localparam PULL_REGISTER = 5'b11011;
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localparam DUMMY = 5'b11100;
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localparam DUMMY = 5'b11100;
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localparam RESET = 5'b11111;
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localparam RESET = 5'b11111;
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// OPCODES TODO: verify how this get synthesised
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// OPCODES TODO: verify how this get synthesised
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`include "T6507LP_Package.v"
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`include "t6507lp_package.v"
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// mem_rw signals
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// mem_rw signals
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localparam MEM_READ = 1'b0;
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localparam MEM_READ = 1'b0;
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localparam MEM_WRITE = 1'b1;
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localparam MEM_WRITE = 1'b1;
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| Line 196... |
Line 196... |
{page_crossed, address_plus_index[7:0]} = temp_addr[7:0] + index;
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{page_crossed, address_plus_index[7:0]} = temp_addr[7:0] + index;
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address_plus_index[12:8] = temp_addr[12:8] + page_crossed;
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address_plus_index[12:8] = temp_addr[12:8] + page_crossed;
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end
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end
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end
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end
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reg [2:0] rst_counter; // a counter to preserve the cpu idle for six cycles
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always @ (posedge clk or negedge reset_n) begin // sequencial always block
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always @ (posedge clk or negedge reset_n) begin // sequencial always block
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if (reset_n == 1'b0) begin
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if (reset_n == 1'b0) begin
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// all registers must assume default values
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// all registers must assume default values
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pc <= 0; // TODO: this is written somewhere. something about a reset vector. must be checked.
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pc <= 0; // TODO: this is written somewhere. something about a reset vector. must be checked.
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sp <= 9'b000000000; // the default is 'h100
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sp <= 9'b000000000; // the default is 'h100
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| Line 209... |
Line 211... |
state <= RESET;
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state <= RESET;
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// registered outputs also receive default values
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// registered outputs also receive default values
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address <= 13'h0000;
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address <= 13'h0000;
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mem_rw <= MEM_READ;
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mem_rw <= MEM_READ;
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data_out <= 8'h00;
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data_out <= 8'h00;
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rst_counter <= 0;
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end
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end
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else begin
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else begin
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state <= next_state;
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state <= next_state;
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case (state)
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case (state)
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RESET: begin // The processor was reset
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RESET: begin // The processor was reset
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rst_counter <= rst_counter + 1;
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sp <= 9'b100000000; // this prevents flipflops with different drivers
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sp <= 9'b100000000; // this prevents flipflops with different drivers
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//$write("under reset");
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//$write("under reset");
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end
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end
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/*
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/*
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FETCH_OP: executed when the processor was reset or the last instruction could not fetch.
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FETCH_OP: executed when the processor was reset or the last instruction could not fetch.
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| Line 578... |
Line 582... |
alu_enable = 1'b0;
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alu_enable = 1'b0;
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next_state = RESET; // these lines prevents latches
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next_state = RESET; // these lines prevents latches
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case (state)
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case (state)
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RESET: begin
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RESET: begin
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if (rst_counter == 6) begin
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next_state = FETCH_OP;
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next_state = FETCH_OP;
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end
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end
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end
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FETCH_OP: begin
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FETCH_OP: begin
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next_state = FETCH_LOW;
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next_state = FETCH_LOW;
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end
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end
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FETCH_OP_CALC_PARAM: begin
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FETCH_OP_CALC_PARAM: begin
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next_state = FETCH_LOW;
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next_state = FETCH_LOW;
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