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https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_fsm.v] - Diff between revs 194 and 195
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| Rev 194 |
Rev 195 |
| Line 239... |
Line 239... |
/*
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/*
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in this state the opcode is already known so truly execution begins.
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in this state the opcode is already known so truly execution begins.
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all instructions execute this cycle.
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all instructions execute this cycle.
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*/
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*/
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FETCH_LOW: begin
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FETCH_LOW: begin
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if (accumulator || implied) begin
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if (accumulator || implied || txs || tsx) begin
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pc <= pc; // is this better?
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pc <= pc; // is this better?
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address <= pc;
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address <= pc;
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mem_rw <= MEM_READ;
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mem_rw <= MEM_READ;
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if (txs) begin
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if (txs) begin
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| Line 603... |
Line 603... |
alu_opcode = ir;
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alu_opcode = ir;
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alu_enable = 1'b1;
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alu_enable = 1'b1;
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alu_a = temp_data;
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alu_a = temp_data;
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end
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end
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FETCH_LOW: begin
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FETCH_LOW: begin
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if (accumulator || implied) begin
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if (accumulator || implied || txs) begin
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alu_opcode = ir;
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alu_opcode = ir;
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alu_enable = 1'b1;
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alu_enable = 1'b1;
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next_state = FETCH_OP;
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next_state = FETCH_OP;
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if (tsx) begin
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alu_a = sp[7:0];
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end
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end
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else if (tsx) begin
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alu_opcode = ir;
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alu_enable = 1'b1;
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next_state = FETCH_OP;
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alu_a = sp[7:0];
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end
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end
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else if (immediate) begin
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else if (immediate) begin
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next_state = FETCH_OP_CALC_PARAM;
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next_state = FETCH_OP_CALC_PARAM;
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end
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end
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else if (zero_page) begin
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else if (zero_page) begin
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