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https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_fsm_tb.v] - Diff between revs 105 and 107
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| Rev 105 |
Rev 107 |
| Line 141... |
Line 141... |
fake_mem[47] = 8'h0a;
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fake_mem[47] = 8'h0a;
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fake_mem[58] = BNE_REL; // testing REL mode, taking a branch, page crossed.
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fake_mem[58] = BNE_REL; // testing REL mode, taking a branch, page crossed.
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fake_mem[59] = 8'hff;
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fake_mem[59] = 8'hff;
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fake_mem[60] = 8'hff;
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fake_mem[60] = 8'hff;
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fake_mem[254] = 8'hff;
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fake_mem[254] = 8'hff;
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fake_mem[255] = 8'h11;
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fake_mem[257] = 8'h55; // PCL fetched from here when executing RTS_IMP
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fake_mem[258] = 8'h01; // PCH fetched from here when executing RTS_IMP
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fake_mem[264] = 8'd340;
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fake_mem[315] = BEQ_REL; // testing REL mode, not taking a branch, page would have crossed.
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fake_mem[315] = BEQ_REL; // testing REL mode, not taking a branch, page would have crossed.
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fake_mem[316] = 8'hff;
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fake_mem[316] = 8'hff;
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fake_mem[317] = BEQ_REL; // testing REL mode, not taking a branch, page would not have crossed.
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fake_mem[317] = BEQ_REL; // testing REL mode, not taking a branch, page would not have crossed.
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fake_mem[318] = 8'h00;
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fake_mem[318] = 8'h00;
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fake_mem[319] = LDA_IDX; // testing IDX mode READ TYPE, no page crossed;
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fake_mem[319] = LDA_IDX; // testing IDX mode READ TYPE, no page crossed;
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| Line 178... |
Line 180... |
//fake_mem[337] = JMP_IND; // testing absolute indirect addressing. no page crossed when updating pointer.
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//fake_mem[337] = JMP_IND; // testing absolute indirect addressing. no page crossed when updating pointer.
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//fake_mem[338] = 8'h3b; // these are commented cause they will actually jump
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//fake_mem[338] = 8'h3b; // these are commented cause they will actually jump
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//fake_mem[339] = 8'h00;
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//fake_mem[339] = 8'h00;
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fake_mem[338] = BRK_IMP;
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fake_mem[338] = BRK_IMP;
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fake_mem[339] = RTI_IMP;
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fake_mem[339] = RTI_IMP;
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fake_mem[340] = RTS_IMP;
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// 341 is skipped due to RTS internal functionality
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fake_mem[342] = PHA_IMP;
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fake_mem[342] = PHP_IMP;
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fake_mem[8190] = 8'h53; // this is the reset vector
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fake_mem[8190] = 8'h53; // this is the reset vector
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fake_mem[8191] = 8'h01;
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fake_mem[8191] = 8'h01;
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