OpenCores
URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [t6507lp_fsm_tb.v] - Diff between revs 108 and 109

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 108 Rev 109
Line 184... Line 184...
                fake_mem[339] = RTI_IMP;
                fake_mem[339] = RTI_IMP;
                fake_mem[340] = RTS_IMP;
                fake_mem[340] = RTS_IMP;
                // 341 is skipped due to RTS internal functionality
                // 341 is skipped due to RTS internal functionality
                fake_mem[342] = PHA_IMP;
                fake_mem[342] = PHA_IMP;
                fake_mem[343] = PHP_IMP;
                fake_mem[343] = PHP_IMP;
 
                fake_mem[344] = PLA_IMP;
 
                fake_mem[345] = PLP_IMP;
 
 
 
 
                fake_mem[8190] = 8'h53; // this is the reset vector
                fake_mem[8190] = 8'h53; // this is the reset vector
                fake_mem[8191] = 8'h01;
                fake_mem[8191] = 8'h01;
                @(negedge clk) // will wait for next negative edge of the clock (t=20)
                @(negedge clk) // will wait for next negative edge of the clock (t=20)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.