OpenCores
URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [vga_controller.v] - Diff between revs 230 and 232

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 230 Rev 232
Line 42... Line 42... 
////                                                                    ////
 
////                                                                    ////
 
////////////////////////////////////////////////////////////////////////////
 
////////////////////////////////////////////////////////////////////////////
 
 
 
 
 
`include "timescale.v"
 
`include "timescale.v"
 
 
 
 
 
module vga_controller ( reset_n, clk_50, pixel, vert_counter, SW, VGA_R, VGA_G, VGA_B, LEDR, VGA_VS, VGA_HS);
 
module vga_controller ( reset_n, clk_50, pixel, vert_counter, SW, VGA_R, VGA_G, VGA_B, LEDR, VGA_VS, VGA_HS, clk_358);
 
 
 
 
 
input reset_n;
 
input reset_n;
 
input clk_50;
 
input clk_50;
 
input [8:0] SW;
 
input [8:0] SW;
 
input [11:0] pixel;
 
input [11:0] pixel;
Line 55... Line 55... 
output reg [3:0] VGA_G;
 
output reg [3:0] VGA_G;
 
output reg [3:0] VGA_B;
 
output reg [3:0] VGA_B;
 
output [9:0] LEDR;
 
output [9:0] LEDR;
 
output reg VGA_VS;
 
output reg VGA_VS;
 
output reg VGA_HS;
 
output reg VGA_HS;
 
 
 
input clk_358;
 
 
 
 
 
reg clk_25;
 
reg clk_25;
 
reg [9:0] hc;
 
reg [9:0] hc;
 
reg [9:0] vc;
 
reg [9:0] vc;
 
reg vsenable;
 
reg vsenable;
Line 138... Line 139... 
                        VGA_VS <= 1;
 
                        VGA_VS <= 1;
 
                end
 
                end
 
        end
 
        end
 
end
 
end
 
 
 
 
 
always @ (posedge clk_25)
 
reg [11:0] pixel_reg;
 
begin
 
 
 
 
 
always @ (posedge clk_358 or negedge reset_n) begin
 
 
 
        if (!reset_n) begin
 
 
 
                pixel_reg <= 12'd0;
 
 
 
        end
 
 
 
        else begin
 
 
 
                pixel_reg <= pixel;
 
 
 
        end
 
 
 
end
 
 
 
 
 
 
 
always @ (posedge clk_25) begin
 
        VGA_R[0] <= 0;
 
        VGA_R[0] <= 0;
 
        VGA_G[0] <= 0;
 
        VGA_G[0] <= 0;
 
        VGA_B[0] <= 0;
 
        VGA_B[0] <= 0;
 
        VGA_R[1] <= 0;
 
        VGA_R[1] <= 0;
 
        VGA_G[1] <= 0;
 
        VGA_G[1] <= 0;
Line 152... Line 163... 
        VGA_G[2] <= 0;
 
        VGA_G[2] <= 0;
 
        VGA_B[2] <= 0;
 
        VGA_B[2] <= 0;
 
        VGA_R[3] <= 0;
 
        VGA_R[3] <= 0;
 
        VGA_G[3] <= 0;
 
        VGA_G[3] <= 0;
 
        VGA_B[3] <= 0;
 
        VGA_B[3] <= 0;
 
 
 
 
 
        if (vidon == 1) begin
 
        if (vidon == 1) begin
 
                VGA_R[0] <= pixel[0];
 
                VGA_R[0] <= pixel_reg[0];
 
                VGA_R[1] <= pixel[1];
 
                VGA_R[1] <= pixel_reg[1];
 
                VGA_R[2] <= pixel[2];
 
                VGA_R[2] <= pixel_reg[2];
 
                VGA_R[3] <= pixel[3];
 
                VGA_R[3] <= pixel_reg[3];
 
                VGA_G[0] <= pixel[4];
 
                VGA_G[0] <= pixel_reg[4];
 
                VGA_G[1] <= pixel[5];
 
                VGA_G[1] <= pixel_reg[5];
 
                VGA_G[2] <= pixel[6];
 
                VGA_G[2] <= pixel_reg[6];
 
                VGA_G[3] <= pixel[7];
 
                VGA_G[3] <= pixel_reg[7];
 
                VGA_B[0] <= pixel[8];
 
                VGA_B[0] <= pixel_reg[8];
 
                VGA_B[1] <= pixel[9];
 
                VGA_B[1] <= pixel_reg[9];
 
                VGA_B[2] <= pixel[10];
 
                VGA_B[2] <= pixel_reg[10];
 
                VGA_B[3] <= pixel[11];
 
                VGA_B[3] <= pixel_reg[11];
 
        end
 
        end
 
end
 
end
 
 
 
 
 
assign vidon = (hc < 640 && vc < 480) ? 1 : 0;
 
assign vidon = (hc < 640 && vc < 480) ? 1 : 0;
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.