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[/] [t80/] [trunk/] [rtl/] [vhdl/] [T80_Pack.vhd] - Diff between revs 15 and 22
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| Rev 15 |
Rev 22 |
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--
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--
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-- Z80 compatible microprocessor core
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-- Z80 compatible microprocessor core
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--
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--
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-- Version : 0235
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-- Version : 0237
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--
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--
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-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
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-- Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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DI : in std_logic_vector(7 downto 0);
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DI : in std_logic_vector(7 downto 0);
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DO : out std_logic_vector(7 downto 0);
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DO : out std_logic_vector(7 downto 0);
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MC : out std_logic_vector(2 downto 0);
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MC : out std_logic_vector(2 downto 0);
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TS : out std_logic_vector(2 downto 0);
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TS : out std_logic_vector(2 downto 0);
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False_M1 : out std_logic;
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False_M1 : out std_logic;
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IntCycle_n : out std_logic
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IntCycle_n : out std_logic;
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IntE : out std_logic
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);
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);
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end component;
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end component;
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type AddressOutput is (aXY,aIOA,aSP,aBC,aDE,aZI,aNone);
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type AddressOutput is (aXY,aIOA,aSP,aBC,aDE,aZI,aNone);
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