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Line 1... |
//
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//
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// Xilinx VHDL ROM generator
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// Xilinx VHDL ROM generator
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//
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//
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// Version : 0220
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// Version : 0221
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//
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//
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// Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
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// Copyright (c) 2001-2002 Daniel Wallner (jesus@opencores.org)
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//
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//
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// All rights reserved
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// All rights reserved
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//
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//
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//
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//
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// File history :
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// File history :
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//
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//
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// 0220 : Initial release
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// 0220 : Initial release
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//
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//
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// 0221 : Fixed block ROMs with partial bytes
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#include <stdio.h>
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#include <stdio.h>
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#include <string>
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#include <string>
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#include <vector>
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#include <vector>
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#include <iostream>
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#include <iostream>
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#define max __max
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#define max __max
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#endif
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#endif
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int main (int argc, char *argv[])
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int main (int argc, char *argv[])
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{
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{
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cerr << "Xilinx VHDL ROM generator by Daniel Wallner. Version 0220\n";
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cerr << "Xilinx VHDL ROM generator by Daniel Wallner. Version 0221\n";
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try
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try
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{
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{
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unsigned long aWidth;
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unsigned long aWidth;
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unsigned long dWidth;
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unsigned long dWidth;
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}
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}
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if (selectIter && blockIter)
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if (selectIter && blockIter)
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{
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{
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printf("\n\tsignal sD : std_logic_vector(D'range);");
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printf("\n\tsignal sD : std_logic_vector(D'range);");
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}
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}
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if (blockIter == 1)
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{
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printf("\n\tsignal bRAMOut : std_logic_vector(%d downto 0);", bytes * 8 - 1);
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}
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if (blockIter > 1)
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if (blockIter > 1)
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{
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{
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printf("\n\ttype bRAMOut_a is array(%d to %d) of std_logic_vector(D'range);", blockTotal - blockIter, blockTotal - 1);
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printf("\n\ttype bRAMOut_a is array(%d to %d) of std_logic_vector(%d downto 0);", blockTotal - blockIter, blockTotal - 1, bytes * 8 - 1);
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printf("\n\tsignal bRAMOut : bRAMOut_a;");
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printf("\n\tsignal bRAMOut : bRAMOut_a;");
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printf("\n\tsignal biA_r : integer;");
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printf("\n\tsignal biA_r : integer;");
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if (!selectIter)
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if (!selectIter)
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{
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{
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printf("\n\tsignal A_r : unsigned(A'left downto 9);");
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printf("\n\tsignal A_r : unsigned(A'left downto 9);");
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}
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}
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if (blockIter == 1)
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if (blockIter == 1)
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{
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{
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printf("\n\n\tbG1: for J in 0 to %d generate", bytes - 1);
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printf("\n\n\tbG1: for J in 0 to %d generate", bytes - 1);
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printf("\n\t\tB%s : RAMB4_S8\n\t\t\tport map (\"00000000\", '1', '0', '0', Clk, A(8 downto 0), ", argv[1]);
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printf("\n\t\tB%s : RAMB4_S8", argv[1]);
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printf("\n\t\t\tport map (\"00000000\", '1', '0', '0', Clk, A(8 downto 0), bRAMOut(7 + 8 * J downto 8 * J));", argv[1]);
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printf("\n\tend generate;");
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printf("\n\n\t");
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if (selectIter)
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if (selectIter)
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{
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{
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printf("b");
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printf("b");
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}
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}
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printf("D(7 + 8 * J downto 8 * J));");
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printf("D <= bRAMOut(D'range);");
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printf("\n\tend generate;");
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}
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}
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if (blockIter > 1)
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if (blockIter > 1)
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{
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{
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printf("\n\n\tbiA_r <= to_integer(A_r(A'left downto 9));");
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printf("\n\n\tbiA_r <= to_integer(A_r(A'left downto 9));");
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printf("\n\n\tbG1: for I in %d to %d generate", blockTotal - blockIter, blockTotal - 1);
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printf("\n\n\tbG1: for I in %d to %d generate", blockTotal - blockIter, blockTotal - 1);
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printf("\n\n\tprocess (biA_r, bRAMOut)\n\tbegin\n\t\t");
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printf("\n\n\tprocess (biA_r, bRAMOut)\n\tbegin\n\t\t");
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if (selectIter)
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if (selectIter)
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{
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{
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printf("b");
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printf("b");
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}
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}
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printf("D <= bRAMOut(%d)(%d downto 0);", blockTotal - blockIter, dWidth - 1);
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printf("D <= bRAMOut(%d)(D'range);", blockTotal - blockIter);
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printf("\n\t\tfor I in %d to %d loop", blockTotal - blockIter + 1, blockTotal - 1);
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printf("\n\t\tfor I in %d to %d loop", blockTotal - blockIter + 1, blockTotal - 1);
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printf("\n\t\t\tif biA_r = I then\n\t\t\t\t");
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printf("\n\t\t\tif biA_r = I then\n\t\t\t\t");
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if (selectIter)
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if (selectIter)
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{
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{
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printf("b");
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printf("b");
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}
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}
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printf("D <= bRAMOut(I);\n\t\t\tend if;");
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printf("D <= bRAMOut(I)(D'range);\n\t\t\tend if;");
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printf("\n\t\tend loop;\n\tend process;");
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printf("\n\t\tend loop;\n\tend process;");
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}
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}
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}
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}
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if (selectIter && blockIter)
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if (selectIter && blockIter)
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