| Line 56... |
Line 56... |
sc_time clkPeriod (BENCH_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
|
sc_time clkPeriod (BENCH_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
|
|
|
sc_clock clk ("clk", clkPeriod);
|
sc_clock clk ("clk", clkPeriod);
|
sc_signal<bool> rst;
|
sc_signal<bool> rst;
|
sc_signal<bool> rstn;
|
sc_signal<bool> rstn;
|
|
sc_signal<bool> rst_o;
|
|
|
sc_signal<bool> jtag_tdi; // JTAG interface
|
sc_signal<bool> jtag_tdi; // JTAG interface
|
sc_signal<bool> jtag_tdo;
|
sc_signal<bool> jtag_tdo;
|
sc_signal<bool> jtag_tms;
|
sc_signal<bool> jtag_tms;
|
sc_signal<bool> jtag_trst;
|
sc_signal<bool> jtag_trst;
|
|
|
sc_signal<bool> eth_sync; // External Ethernet
|
|
sc_signal<bool> eth_tx;
|
|
sc_signal<bool> eth_rx;
|
|
sc_signal<bool> eth_clk;
|
|
sc_signal<bool> eth_md;
|
|
sc_signal<bool> eth_mdc;
|
|
|
|
sc_signal<bool> uart_rx; // External UART
|
sc_signal<bool> uart_rx; // External UART
|
sc_signal<bool> uart_tx;
|
sc_signal<bool> uart_tx;
|
|
|
|
sc_signal<bool> spi_sd_sclk; // SD Card Memory SPI
|
|
sc_signal<bool> spi_sd_ss;
|
|
sc_signal<bool> spi_sd_miso;
|
|
sc_signal<bool> spi_sd_mosi;
|
|
|
|
sc_signal<uint32_t> gpio_a; // GPIO bus - output only in verilator sims
|
|
|
|
sc_signal<bool> spi1_mosi;
|
|
sc_signal<bool> spi1_miso;
|
|
sc_signal<bool> spi1_ss;
|
|
sc_signal<bool> spi1_sclk;
|
|
|
|
|
// Verilator accessor
|
// Verilator accessor
|
//OrpsocAccess *accessor;
|
//OrpsocAccess *accessor;
|
|
|
// Modules
|
// Modules
|
Vorpsoc_top *orpsoc; // Verilated ORPSoC
|
Vorpsoc_top *orpsoc; // Verilated ORPSoC
|
| Line 94... |
Line 101... |
//monitor = new Or1200MonitorSC ("monitor", accessor);
|
//monitor = new Or1200MonitorSC ("monitor", accessor);
|
|
|
// Connect up ORPSoC
|
// Connect up ORPSoC
|
orpsoc->clk_pad_i (clk);
|
orpsoc->clk_pad_i (clk);
|
orpsoc->rst_pad_i (rstn);
|
orpsoc->rst_pad_i (rstn);
|
|
orpsoc->rst_pad_o (rst_o);
|
|
|
orpsoc->dbg_tck_pad_i (clk); // JTAG interface
|
orpsoc->dbg_tck_pad_i (clk); // JTAG interface
|
orpsoc->dbg_tdi_pad_i (jtag_tdi);
|
orpsoc->dbg_tdi_pad_i (jtag_tdi);
|
orpsoc->dbg_tdo_pad_i (jtag_tdo);
|
|
orpsoc->dbg_tms_pad_i (jtag_tms);
|
orpsoc->dbg_tms_pad_i (jtag_tms);
|
|
orpsoc->dbg_tdo_pad_o (jtag_tdo);
|
orpsoc->eth_sync_pad_o (eth_sync); // External Ethernet
|
|
orpsoc->eth_tx_pad_o (eth_tx);
|
|
orpsoc->eth_rx_pad_i (eth_rx);
|
|
orpsoc->eth_md_pad_io (eth_md);
|
|
orpsoc->eth_mdc_pad_o (eth_mdc);
|
|
|
|
orpsoc->uart0_srx_pad_i (uart_rx); // External UART
|
orpsoc->uart0_srx_pad_i (uart_rx); // External UART
|
orpsoc->uart0_stx_pad_o (uart_tx);
|
orpsoc->uart0_stx_pad_o (uart_tx);
|
|
|
|
orpsoc->spi_sd_sclk_pad_o (spi_sd_sclk); // SD Card Memory SPI
|
|
orpsoc->spi_sd_ss_pad_o (spi_sd_ss);
|
|
orpsoc->spi_sd_miso_pad_i (spi_sd_miso);
|
|
orpsoc->spi_sd_mosi_pad_o (spi_sd_mosi);
|
|
|
|
orpsoc->spi1_mosi_pad_o (spi1_mosi);
|
|
orpsoc->spi1_miso_pad_i (spi1_miso);
|
|
orpsoc->spi1_ss_pad_o (spi1_ss);
|
|
orpsoc->spi1_sclk_pad_o (spi1_sclk);
|
|
|
|
|
|
orpsoc->gpio_a_pad_io (gpio_a); // GPIO bus - output only in
|
|
// verilator sims
|
|
|
|
|
// Connect up the VCD trace handler
|
// Connect up the VCD trace handler
|
//trace->clk (clk); // Trace
|
//trace->clk (clk); // Trace
|
|
|
// Connect up the SystemC modules
|
// Connect up the SystemC modules
|
//reset->clk (clk); // Reset
|
//reset->clk (clk); // Reset
|
| Line 123... |
Line 140... |
|
|
// Tie off signals
|
// Tie off signals
|
jtag_tdi = 1; // Tie off the JTAG inputs
|
jtag_tdi = 1; // Tie off the JTAG inputs
|
jtag_tms = 1;
|
jtag_tms = 1;
|
|
|
|
|
uart_rx = 1; // Tie off the UART
|
uart_rx = 1; // Tie off the UART
|
|
|
|
spi_sd_miso = 0; // Tie off master-in/slave-out of SD SPI bus
|
|
|
|
spi1_miso = 0;
|
|
|
|
printf("Beginning test\n");
|
|
|
// Execute until we stop
|
// Execute until we stop
|
sc_start ();
|
sc_start ();
|
|
|
// Free memory
|
// Free memory
|
//delete monitor;
|
//delete monitor;
|
