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[/] [test_project/] [trunk/] [bench/] [verilog/] [orpsoc_testbench_defines.v] - Diff between revs 34 and 52
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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`define CLOCK_PERIOD 100
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// 25Mhz clock = 40ns period
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`define CLOCK_PERIOD 40
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// The ORPSoC tests makefile should generate the test_define.v file in
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// The ORPSoC tests makefile should generate the test_define.v file in
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// the sim/run directory.
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// the sim/run directory.
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`ifdef TEST_DEFINE_FILE
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`ifdef TEST_DEFINE_FILE
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`include "test_define.v"
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`include "test_define.v"
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