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[/] [test_project/] [trunk/] [bench/] [verilog/] [orpsoc_testbench_defines.v] - Diff between revs 34 and 52

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//// Public License along with this source; if not, download it   ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
 
 
`define CLOCK_PERIOD 100
// 25Mhz clock = 40ns period
 
`define CLOCK_PERIOD 40
 
 
// The ORPSoC tests makefile should generate the test_define.v file in
// The ORPSoC tests makefile should generate the test_define.v file in
// the sim/run directory.
// the sim/run directory.
`ifdef TEST_DEFINE_FILE
`ifdef TEST_DEFINE_FILE
 `include "test_define.v"
 `include "test_define.v"

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