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//Normal Interupt signal enable register
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//Normal Interupt signal enable register
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#define ECC 0x1 //Interupt on CommandComplete
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#define ECC 0x1 //Interupt on CommandComplete
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#define EEI 0x8000 //Interupt on CommandError
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#define EEI 0x8000 //Interupt on CommandError
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//Data Interupt
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//Data Interupt
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#define TRE 0x10
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#define CMDE 0x08
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#define TRE 0x20
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#define CMDE 0x10
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#define FIFOE 0x04
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#define FIFOE 0x04
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#define MRC 0x02
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#define MRC 0x02
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#define TRS 0x01
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#define TRS 0x01
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#define SD_ENABLE 0
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#define SD_ENABLE 0
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