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         | Rev 62 | Rev 65 | 
    
    
      
        | Line 16... | Line 16... | 
      
        | #define MC_BASE_ADD     0x93000000
 | #define MC_BASE_ADD     0x93000000
 | 
      
        | #define CRT_BASE_ADD    0x97000000
 | #define CRT_BASE_ADD    0x97000000
 | 
      
        | #define FBMEM_BASE_ADD  0xa8000000
 | #define FBMEM_BASE_ADD  0xa8000000
 | 
      
        | #define ETH_BASE_ADD    0x92000000
 | #define ETH_BASE_ADD    0x92000000
 | 
      
        | #define KBD_BASE_ADD    0x94000000
 | #define KBD_BASE_ADD    0x94000000
 | 
      
        |   | #define MMC_BASE_ADD    0xa0000000
 | 
      
        |  
 |  
 | 
      
        | /* Define this if you want to use I and/or D cache */
 | /* Define this if you want to use I and/or D cache */
 | 
      
        | #define IC_SIZE         CONFIG_OR32_IC_SIZE
 | #define IC_SIZE         CONFIG_OR32_IC_SIZE
 | 
      
        | #define IC_LINE         CONFIG_OR32_IC_LINE
 | #define IC_LINE         CONFIG_OR32_IC_LINE
 | 
      
        | #define DC_SIZE         CONFIG_OR32_DC_SIZE
 | #define DC_SIZE         CONFIG_OR32_DC_SIZE
 | 
    
   
 
 
         
                
        
            
            
        
        
             
    
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