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[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [or1200r2/] [or1200_rfram_generic.v] - Diff between revs 18 and 48

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Rev 18 Rev 48
Line 119... Line 119...
reg     [32*dw-1:0]              mem;
reg     [32*dw-1:0]              mem;
`endif
`endif
reg     [dw-1:0]         do_a;
reg     [dw-1:0]         do_a;
reg     [dw-1:0]         do_b;
reg     [dw-1:0]         do_b;
 
 
 
   // Function to access GPRs (for use by Verilator). No need to hide this one
 
   // from the simulator, since it has an input (as required by IEEE 1364-2001).
 
   function [31:0] get_gpr;
 
      // verilator public
 
      input [aw-1:0]             gpr_no;
 
 
 
      get_gpr = { mem[gpr_no*32 + 31], mem[gpr_no*32 + 30],
 
                  mem[gpr_no*32 + 29], mem[gpr_no*32 + 28],
 
                  mem[gpr_no*32 + 27], mem[gpr_no*32 + 26],
 
                  mem[gpr_no*32 + 25], mem[gpr_no*32 + 24],
 
                  mem[gpr_no*32 + 23], mem[gpr_no*32 + 22],
 
                  mem[gpr_no*32 + 21], mem[gpr_no*32 + 20],
 
                  mem[gpr_no*32 + 19], mem[gpr_no*32 + 18],
 
                  mem[gpr_no*32 + 17], mem[gpr_no*32 + 16],
 
                  mem[gpr_no*32 + 15], mem[gpr_no*32 + 14],
 
                  mem[gpr_no*32 + 13], mem[gpr_no*32 + 12],
 
                  mem[gpr_no*32 + 11], mem[gpr_no*32 + 10],
 
                  mem[gpr_no*32 +  9], mem[gpr_no*32 +  8],
 
                  mem[gpr_no*32 +  7], mem[gpr_no*32 +  6],
 
                  mem[gpr_no*32 +  5], mem[gpr_no*32 +  4],
 
                  mem[gpr_no*32 +  3], mem[gpr_no*32 +  2],
 
                  mem[gpr_no*32 +  1], mem[gpr_no*32 +  0] };
 
 
 
   endfunction // get_gpr
 
 
//
//
// Write port
// Write port
//
//
always @(posedge clk or posedge rst)
always @(posedge clk or posedge rst)
        if (rst) begin
        if (rst) begin

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