URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [or1k_top/] [or1k_top.v] - Diff between revs 18 and 42

Rev 18	Rev 42
Line 3...	Line 3...
`// synopsys translate_on`	`// synopsys translate_on`

`include "or1k_top.h"	`include "or1k_top.h"
`include "or1200_defines.v"	`include "or1200_defines.v"

`module or1k (`	`module or1k_top (`
`// System`	`// System`
`clk_i, rst_i, pic_ints_i,`	`clk_i, rst_i, pic_ints_i,`

`// Instruction WISHBONE INTERFACE`	`// Instruction WISHBONE INTERFACE`
`iwb_clk_i, iwb_rst_i, iwb_ack_i, iwb_err_i, iwb_rty_i, iwb_dat_i,`	`iwb_clk_i, iwb_rst_i, iwb_ack_i, iwb_err_i, iwb_rty_i, iwb_dat_i,`
Line 354...	Line 354...
`.debug_tdi_i ( debug_tdi_o ),`	`.debug_tdi_i ( debug_tdi_o ),`
`.mbist_tdi_i ( 1'b0 )`	`.mbist_tdi_i ( 1'b0 )`
`);`	`);`

`endmodule`	`endmodule`
`No newline at end of file`	`No newline at end of file`

`No newline at end of file`	`No newline at end of file`