URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [uart16550/] [uart_transmitter.v] - Diff between revs 18 and 33

Rev 18	Rev 33
Line 210...	Line 210...
`end`	`end`

`always @(negedge tf_push)`	`always @(negedge tf_push)`
`begin`	`begin`
`$fwrite(file_handler, "%s", tf_data_out);`	`$fwrite(file_handler, "%s", tf_data_out);`
	`ifdef UART16550_SIM_OUTPUT
`$display("UART: %s", tf_data_out);`	`$display("UART: %s", tf_data_out);`
	`endif
`end`	`end`
`endif	`endif

`// TRANSMITTER FINAL STATE MACHINE`	`// TRANSMITTER FINAL STATE MACHINE`