OpenCores
URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sim/] [bin/] [Makefile] - Diff between revs 41 and 42

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 41 Rev 42
Line 270... Line 270...
        sed < $(SIM_BIN_DIR)/$(VLT_COMMAND_FILE) > $(SIM_RUN_DIR)/$(VLT_COMMAND_FILE).generated \
        sed < $(SIM_BIN_DIR)/$(VLT_COMMAND_FILE) > $(SIM_RUN_DIR)/$(VLT_COMMAND_FILE).generated \
                        -e s!\$$BENCH_DIR!$(BENCH_VERILOG_DIR)!              \
                        -e s!\$$BENCH_DIR!$(BENCH_VERILOG_DIR)!              \
                        -e s!\$$RTL_DIR!$(RTL_VERILOG_DIR)!                  \
                        -e s!\$$RTL_DIR!$(RTL_VERILOG_DIR)!                  \
                        -e s!\$$BACKEND_DIR!$(BACKEND_DIR)!                  \
                        -e s!\$$BACKEND_DIR!$(BACKEND_DIR)!                  \
                        -e \\!^//.*\$$!d -e \\!^\$$!d;
                        -e \\!^//.*\$$!d -e \\!^\$$!d;
 
        verilator -language 1364-2001 -Wno-lint --top-module orpsoc_top -Mdir . -sc -f $(VLT_COMMAND_FILE).generated
 
 
 
 
clean-sw:
clean-sw:
        @for TEST in $(TESTS); do \
        @for TEST in $(TESTS); do \
                echo "Current test: $$TEST"; \
                echo "Current test: $$TEST"; \

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.