URL https://opencores.org/ocsvn/test_project/test_project/trunk

Subversion Repositories test_project

[/] [test_project/] [trunk/] [sw/] [mmu/] [except.S] - Diff between revs 25 and 33

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Rev 25	Rev 33
Line 19...	Line 19...
`.extern _excpt_syscall`	`.extern _excpt_syscall`
`.extern _excpt_break`	`.extern _excpt_break`
`.extern _excpt_trap`	`.extern _excpt_trap`


`.org 0x200`	`.org 0x000`
`_buserr_vector:`	`_buserr_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 33...	Line 33...
`l.ori r10,r10,lo(_excpt_buserr)`	`l.ori r10,r10,lo(_excpt_buserr)`
`l.lwz r10,0x0(r10)`	`l.lwz r10,0x0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x300`	`.org 0x100`
`_dpfault_vector:`	`_dpfault_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 52...	Line 52...
`l.ori r10,r10,lo(_excpt_dpfault)`	`l.ori r10,r10,lo(_excpt_dpfault)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x400`	`.org 0x200`
`_ipfault_vector:`	`_ipfault_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 66...	Line 66...
`l.ori r10,r10,lo(_excpt_ipfault)`	`l.ori r10,r10,lo(_excpt_ipfault)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x500`	`.org 0x300`
`_lpint_vector:`	`_lpint_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 80...	Line 80...
`l.ori r10,r10,lo(_excpt_tick)`	`l.ori r10,r10,lo(_excpt_tick)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x600`	`.org 0x400`
`_align_vector:`	`_align_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 94...	Line 94...
`l.ori r10,r10,lo(_excpt_align)`	`l.ori r10,r10,lo(_excpt_align)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x700`	`.org 0x500`
`_illinsn_vector:`	`_illinsn_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 108...	Line 108...
`l.ori r10,r10,lo(_excpt_illinsn)`	`l.ori r10,r10,lo(_excpt_illinsn)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x800`	`.org 0x600`
`_hpint_vector:`	`_hpint_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 122...	Line 122...
`l.ori r10,r10,lo(_excpt_int)`	`l.ori r10,r10,lo(_excpt_int)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0x900`	`.org 0x700`
`_dtlbmiss_vector:`	`_dtlbmiss_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 141...	Line 141...
`l.ori r10,r10,lo(_excpt_dtlbmiss)`	`l.ori r10,r10,lo(_excpt_dtlbmiss)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0xa00`	`.org 0x800`
`_itlbmiss_vector:`	`_itlbmiss_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 155...	Line 155...
`l.ori r10,r10,lo(_excpt_itlbmiss)`	`l.ori r10,r10,lo(_excpt_itlbmiss)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0xb00`	`.org 0x900`
`_range_vector:`	`_range_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 169...	Line 169...
`l.ori r10,r10,lo(_excpt_range)`	`l.ori r10,r10,lo(_excpt_range)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0xc00`	`.org 0xa00`
`_syscall_vector:`	`_syscall_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 183...	Line 183...
`l.ori r10,r10,lo(_excpt_syscall)`	`l.ori r10,r10,lo(_excpt_syscall)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0xd00`	`.org 0xb00`
`_break_vector:`	`_break_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`
Line 197...	Line 197...
`l.ori r10,r10,lo(_excpt_break)`	`l.ori r10,r10,lo(_excpt_break)`
`l.lwz r10,0(r10)`	`l.lwz r10,0(r10)`
`l.jr r10`	`l.jr r10`
`l.nop`	`l.nop`

`.org 0xe00`	`.org 0xc00`
`_trap_vector:`	`_trap_vector:`
`l.addi r1,r1,-116`	`l.addi r1,r1,-116`
`l.sw 0x18(r1),r9`	`l.sw 0x18(r1),r9`
`l.jal store_regs`	`l.jal store_regs`
`l.nop`	`l.nop`

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[/] [test_project/] [trunk/] [sw/] [mmu/] [except.S] - Diff between revs 25 and 33