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[/] [test_project/] [trunk/] [sw/] [support/] [orp.ld] - Diff between revs 25 and 31

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Rev 25 Rev 31
Line 1... Line 1...
 
/*
MEMORY
MEMORY
        {
        {
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        flash   : ORIGIN = 0x04000000, LENGTH = 0x00200000
        flash   : ORIGIN = 0x04000000, LENGTH = 0x00200000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x001fe000
        ram     : ORIGIN = 0x00002000, LENGTH = 0x001fe000
        icm     : ORIGIN = 0x00800000, LENGTH = 0x00004000
        icm     : ORIGIN = 0x00800000, LENGTH = 0x00004000
        }
        }
 
 */
 
MEMORY
 
        {
 
        ram     : ORIGIN = 0x00000000, LENGTH = 0x01000000
 
        }
 
 
SECTIONS
SECTIONS
{
{
      .reset :
      .reset :
        {
        {
        *(.reset)
        *(.reset)
        } > flash
        } > ram
 
 
        .text ALIGN(0x04):
 
        {
 
        *(.text)
 
        } > flash
 
 
 
      .rodata :
 
        {
 
        *(.rodata)
 
        *(.rodata.*)
 
        } > flash
 
 
 
      .dummy ALIGN(0x04):
      .dummy ALIGN(0x04):
        {
        {
        _src_beg = .;
        _src_beg = .;
        } > flash
        } > ram
 
 
      .vectors :
      .vectors :
        AT ( ADDR (.dummy) )
        AT ( ADDR (.dummy) )
        {
        {
        _vec_start = .;
        _vec_start = .;
        *(.vectors)
        *(.vectors)
        _vec_end = .;
        _vec_end = .;
        } > vectors
        } > ram
 
 
 
        .text ALIGN(0x04):
 
        {
 
        *(.text)
 
        } > ram
 
 
 
      .rodata :
 
        {
 
        *(.rodata)
 
        *(.rodata.*)
 
        } > ram
 
 
     .icm :
     .icm :
        AT ( ADDR (.dummy) + SIZEOF (.vectors) )
 
        {
        {
        _icm_start = .;
        _icm_start = .;
        *(.icm)
        *(.icm)
        _icm_end = .;
        _icm_end = .;
        } > icm
        } > ram
 
 
     .data :
     .data :
        AT ( ADDR (.dummy) + SIZEOF (.vectors) + SIZEOF(.icm) )
 
        {
        {
        _dst_beg = .;
        _dst_beg = .;
        *(.data)
        *(.data)
        _dst_end = .;
        _dst_end = .;
        } > ram
        } > ram

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