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type micro_states is (idle, nop, ld_nn, st_nn, ld_dAn1, ld_AnXn1, ld_AnXn2, st_dAn1, ld_AnXnbd1, ld_AnXnbd2, ld_AnXnbd3,
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type micro_states is (idle, nop, ld_nn, st_nn, ld_dAn1, ld_AnXn1, ld_AnXn2, st_dAn1, ld_AnXnbd1, ld_AnXnbd2, ld_AnXnbd3,
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ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4,
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ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4,
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st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3,
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st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3,
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andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3,
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andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3,
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rte4, rte5, rtd1, rtd2, trap00, trap0, trap1, trap2, trap3,
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rte4, rte5, rtd1, rtd2, trap00, trap0, trap1, trap2, trap3, cas1, cas2, cas21, cas22, cas23, cas24,
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cas25, cas26, cas27, cas28, chk20, chk21, chk22, chk23, chk24,
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trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1,
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trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1,
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mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2);
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mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2);
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constant opcMOVE : integer := 0; --
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constant opcMOVE : integer := 0; --
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constant opcMOVEQ : integer := 1; --
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constant opcMOVEQ : integer := 1; --
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constant opcUNPACK : integer := 78; --
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constant opcUNPACK : integer := 78; --
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constant hold_ea_data : integer := 79; --
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constant hold_ea_data : integer := 79; --
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constant store_ea_packdata : integer := 80; --
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constant store_ea_packdata : integer := 80; --
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constant exec_BS : integer := 81; --
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constant exec_BS : integer := 81; --
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constant hold_OP2 : integer := 82; --
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constant hold_OP2 : integer := 82; --
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constant restore_ADDR : integer := 83; --
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constant alu_exec : integer := 84; --
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constant alu_move : integer := 85; --
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constant alu_setFlags : integer := 86; --
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constant opcCHK2 : integer := 87; --
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constant opcEXTB : integer := 88; --
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constant lastOpcBit : integer := 82;
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constant lastOpcBit : integer := 88;
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component TG68K_ALU
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component TG68K_ALU
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generic(
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generic(
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MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL,
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MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL,
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MUL_Hardware :integer; --0=>no, 1=>yes,
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MUL_Hardware :integer; --0=>no, 1=>yes,
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BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1)
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BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1)
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);
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);
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port(
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port(
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clk : in std_logic;
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clk : in std_logic;
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Reset : in std_logic;
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Reset : in std_logic;
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CPU : in std_logic_vector(1 downto 0):="00"; -- 00->68000 01->68010 11->68020(only some parts - yet)
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clkena_lw : in std_logic:='1';
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clkena_lw : in std_logic:='1';
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execOPC : in bit;
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execOPC : in bit;
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decodeOPC : in bit;
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decodeOPC : in bit;
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exe_condition : in std_logic;
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exe_condition : in std_logic;
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exec_tas : in std_logic;
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exec_tas : in std_logic;
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