| Line 106... |
Line 106... |
berr : in std_logic:='0'; -- only 68000 Stackpointer dummy
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berr : in std_logic:='0'; -- only 68000 Stackpointer dummy
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CPU : in std_logic_vector(1 downto 0):="00"; -- 00->68000 01->68010 11->68020(only some parts - yet)
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CPU : in std_logic_vector(1 downto 0):="00"; -- 00->68000 01->68010 11->68020(only some parts - yet)
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addr_out : out std_logic_vector(31 downto 0);
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addr_out : out std_logic_vector(31 downto 0);
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data_write : out std_logic_vector(15 downto 0);
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data_write : out std_logic_vector(15 downto 0);
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nWr : out std_logic;
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nWr : out std_logic;
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nUDS, nLDS : out std_logic;
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nUDS : out std_logic;
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nLDS : out std_logic;
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busstate : out std_logic_vector(1 downto 0); -- 00-> fetch code 10->read data 11->write data 01->no memaccess
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busstate : out std_logic_vector(1 downto 0); -- 00-> fetch code 10->read data 11->write data 01->no memaccess
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nResetOut : out std_logic;
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nResetOut : out std_logic;
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FC : out std_logic_vector(2 downto 0);
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FC : out std_logic_vector(2 downto 0);
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--
|
|
clr_berr : out std_logic;
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clr_berr : out std_logic;
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-- for debug
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-- for debug
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skipFetch : out std_logic;
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skipFetch : out std_logic;
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-- regin : buffer std_logic_vector(31 downto 0)
|
|
regin_out : out std_logic_vector(31 downto 0);
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regin_out : out std_logic_vector(31 downto 0);
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CACR_out : out std_logic_vector( 3 downto 0);
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CACR_out : out std_logic_vector( 3 downto 0);
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VBR_out : out std_logic_vector(31 downto 0)
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VBR_out : out std_logic_vector(31 downto 0)
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);
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);
|
end TG68KdotC_Kernel;
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end TG68KdotC_Kernel;
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| Line 358... |
Line 357... |
OP1out => OP1out, --: in std_logic_vector(31 downto 0);
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OP1out => OP1out, --: in std_logic_vector(31 downto 0);
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OP2out => OP2out, --: in std_logic_vector(31 downto 0);
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OP2out => OP2out, --: in std_logic_vector(31 downto 0);
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reg_QA => reg_QA, --: in std_logic_vector(31 downto 0);
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reg_QA => reg_QA, --: in std_logic_vector(31 downto 0);
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reg_QB => reg_QB, --: in std_logic_vector(31 downto 0);
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reg_QB => reg_QB, --: in std_logic_vector(31 downto 0);
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opcode => opcode, --: in std_logic_vector(15 downto 0);
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opcode => opcode, --: in std_logic_vector(15 downto 0);
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-- datatype => datatype, --: in std_logic_vector(1 downto 0);
|
|
exe_opcode => exe_opcode, --: in std_logic_vector(15 downto 0);
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exe_opcode => exe_opcode, --: in std_logic_vector(15 downto 0);
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exe_datatype => exe_datatype, --: in std_logic_vector(1 downto 0);
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exe_datatype => exe_datatype, --: in std_logic_vector(1 downto 0);
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sndOPC => sndOPC, --: in std_logic_vector(15 downto 0);
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sndOPC => sndOPC, --: in std_logic_vector(15 downto 0);
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last_data_read => last_data_read(15 downto 0), --: in std_logic_vector(31 downto 0);
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last_data_read => last_data_read(15 downto 0), --: in std_logic_vector(31 downto 0);
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data_read => data_read(15 downto 0), --: in std_logic_vector(31 downto 0);
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data_read => data_read(15 downto 0), --: in std_logic_vector(31 downto 0);
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| Line 573... |
Line 571... |
IF exec(movem_action) ='1' THEN
|
IF exec(movem_action) ='1' THEN
|
rf_dest_addr <= rf_source_addrd;
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rf_dest_addr <= rf_source_addrd;
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ELSIF set(briefext)='1' THEN
|
ELSIF set(briefext)='1' THEN
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rf_dest_addr <= brief(15 downto 12);
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rf_dest_addr <= brief(15 downto 12);
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ELSIF set(get_bfoffset)='1' THEN
|
ELSIF set(get_bfoffset)='1' THEN
|
IF opcode(15 downto 12)="1110" THEN
|
-- IF opcode(15 downto 12)="1110" THEN
|
rf_dest_addr <= '0'&sndOPC(8 downto 6);
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rf_dest_addr <= '0'&sndOPC(8 downto 6);
|
ELSE
|
-- ELSE
|
rf_dest_addr <= sndOPC(9 downto 6);
|
-- rf_dest_addr <= sndOPC(9 downto 6);
|
END IF;
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-- END IF;
|
ELSIF dest_2ndHbits='1' THEN
|
ELSIF dest_2ndHbits='1' THEN
|
rf_dest_addr <= '0'&sndOPC(14 downto 12);
|
rf_dest_addr <= '0'&sndOPC(14 downto 12);
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ELSIF set(write_reminder)='1' THEN
|
ELSIF set(write_reminder)='1' THEN
|
rf_dest_addr <= '0'&sndOPC(2 downto 0);
|
rf_dest_addr <= '0'&sndOPC(2 downto 0);
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ELSIF setstackaddr='1' THEN
|
ELSIF setstackaddr='1' THEN
|
