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[/] [tg68kc/] [trunk/] [TG68KdotC_Kernel.vhd] - Diff between revs 8 and 9

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Rev 8 Rev 9
Line 19... Line 19...
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.    --
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.    --
--                                                                          --
--                                                                          --
------------------------------------------------------------------------------
------------------------------------------------------------------------------
------------------------------------------------------------------------------
------------------------------------------------------------------------------
 
 
 
-- 04.11.2019 TG insert RTE from TH
-- 03.11.2019 TG insert TrapV from TH 
-- 03.11.2019 TG insert TrapV from TH 
-- 03.11.2019 TG bugfix MUL 64Bit 
-- 03.11.2019 TG bugfix MUL 64Bit 
-- 03.11.2019 TG rework barrel shifter - some other tweaks
-- 03.11.2019 TG rework barrel shifter - some other tweaks
-- 02.11.2019 TG bugfig N-Flag and Z-Flag for DIV
-- 02.11.2019 TG bugfig N-Flag and Z-Flag for DIV
-- 30.10.2019 TG bugfix RTR in 68020-mode
-- 30.10.2019 TG bugfix RTR in 68020-mode
Line 694... Line 695...
                                ELSIF setstate="10" AND write_back='1' THEN
                                ELSIF setstate="10" AND write_back='1' THEN
--              elsif setstate = "10" and write_back = '1' and next_micro_state = idle then  --???
--              elsif setstate = "10" and write_back = '1' and next_micro_state = idle then  --???
                                        exec_write_back <= '1';
                                        exec_write_back <= '1';
                                END IF;
                                END IF;
 
 
                                IF exec(save_OP2)='1' THEN
                                IF exec(hold_OP2)='1' THEN
                                        use_direct_data <= '1';
                                        use_direct_data <= '1';
                                END IF;
                                END IF;
                                IF set_direct_data='1' THEN
                                IF set_direct_data='1' THEN
                                        direct_data <= '1';
                                        direct_data <= '1';
                                        use_direct_data <= '1';
                                        use_direct_data <= '1';
Line 1334... Line 1335...
-- decode opcode
-- decode opcode
-----------------------------------------------------------------------------
-----------------------------------------------------------------------------
PROCESS (clk, cpu, OP1out, OP2out, opcode, exe_condition, nextpass, micro_state, decodeOPC, state, setexecOPC, Flags, FlagsSR, direct_data, build_logical,
PROCESS (clk, cpu, OP1out, OP2out, opcode, exe_condition, nextpass, micro_state, decodeOPC, state, setexecOPC, Flags, FlagsSR, direct_data, build_logical,
                 build_bcd, set_Z_error, trapd, movem_run, last_data_read, set, set_V_Flag, z_error, trap_trace, trap_interrupt,
                 build_bcd, set_Z_error, trapd, movem_run, last_data_read, set, set_V_Flag, z_error, trap_trace, trap_interrupt,
                 SVmode, preSVmode, stop, long_done, ea_only, setstate, execOPC, exec_write_back, exe_datatype,
                 SVmode, preSVmode, stop, long_done, ea_only, setstate, execOPC, exec_write_back, exe_datatype,
                 datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, trap_trapv,
                 datatype, interrupt, c_out, trapmake, rot_cnt, brief, addr, trap_trapv, last_data_in,
                 long_start, set_datatype, sndOPC, set_exec, exec, ea_build_now, reg_QA, reg_QB, make_berr, trap_berr)
                 long_start, set_datatype, sndOPC, set_exec, exec, ea_build_now, reg_QA, reg_QB, make_berr, trap_berr)
        BEGIN
        BEGIN
                TG68_PC_brw <= '0';
                TG68_PC_brw <= '0';
                setstate <= "00";
                setstate <= "00";
                Regwrena_now <= '0';
                Regwrena_now <= '0';
Line 3181... Line 3182...
                                        setstate <= "11";
                                        setstate <= "11";
                                        datatype <= "01";
                                        datatype <= "01";
                                        writeSR <= '1';
                                        writeSR <= '1';
                                        next_micro_state <= trap3;
                                        next_micro_state <= trap3;
 
 
 
                                                                                -- return from exception - RTE
 
                                                                                -- fetch PC and status register from stack
 
                                                                                -- 010+ fetches another word containing
 
                                                                                -- the 12 bit vector offset and the
 
                                                                                -- frame format. If the frame format is
 
                                                                                -- 2 another two words have to be taken
 
                                                                                -- from the stack
                                WHEN rte1 =>            -- RTE
                                WHEN rte1 =>            -- RTE
                                        datatype <= "10";
                                        datatype <= "10";
                                        setstate <= "10";
                                        setstate <= "10";
                                        set(postadd) <= '1';
                                        set(postadd) <= '1';
                                        setstackaddr <= '1';
                                        setstackaddr <= '1';
Line 3196... Line 3204...
                                        next_micro_state <= rte2;
                                        next_micro_state <= rte2;
                                WHEN rte2 =>            -- RTE
                                WHEN rte2 =>            -- RTE
                                        datatype <= "01";
                                        datatype <= "01";
                                        set(update_FC) <= '1';
                                        set(update_FC) <= '1';
                                        IF (VBR_Stackframe=1 OR (cpu(0)='1' AND VBR_Stackframe=2)) AND opcode(2)='0' THEN
                                        IF (VBR_Stackframe=1 OR (cpu(0)='1' AND VBR_Stackframe=2)) AND opcode(2)='0' THEN
 
                                                                                                -- 010+ reads another word
                                                setstate <= "10";
                                                setstate <= "10";
                                                set(postadd) <= '1';
                                                set(postadd) <= '1';
                                                setstackaddr <= '1';
                                                setstackaddr <= '1';
                                                next_micro_state <= rte3;
                                                next_micro_state <= rte3;
                                        ELSE
                                        ELSE
                                                next_micro_state <= nop;
                                                next_micro_state <= nop;
                                        END IF;
                                        END IF;
                                WHEN rte3 =>            -- RTE
--                              WHEN rte3 =>                    -- RTE
 
--                                      next_micro_state <= nop;
 
----                                    set(update_FC) <= '1';
 
-- paste and copy form TH       ---------       
 
                                when rte3 => -- RTE
 
                                        setstate <= "01"; -- idle state to wait
 
                                                                                        -- for input data to
 
                                                                                        -- arrive
 
                                        next_micro_state <= rte4;
 
                                WHEN rte4 =>         -- RTE
 
                                                                                        -- check for stack frame format #2
 
                                        if last_data_in(15 downto 12)="0010" then
 
                                                                                  -- read another 32 bits in this case
 
                                                setstate <= "10"; -- read
 
                                                datatype <= "10"; -- long word
 
                                                set(postadd) <= '1';
 
                                                setstackaddr <= '1';
 
                                                next_micro_state <= rte5;
 
                                        else
 
                                                datatype <= "01";
                                        next_micro_state <= nop;
                                        next_micro_state <= nop;
--                                      set(update_FC) <= '1';
                                        end if;
 
                                WHEN rte5 =>            -- RTE
 
                                        next_micro_state <= nop;
 
-------------------------------------
 
 
                                WHEN rtd1 =>            -- RTD
                                WHEN rtd1 =>            -- RTD
                                        next_micro_state <= rtd2;
                                        next_micro_state <= rtd2;
                                WHEN rtd2 =>            -- RTD
                                WHEN rtd2 =>            -- RTD
                                        setstackaddr <= '1';
                                        setstackaddr <= '1';
Line 3297... Line 3327...
                                        ELSE
                                        ELSE
                                                next_micro_state <= mul2;
                                                next_micro_state <= mul2;
                                        END IF;
                                        END IF;
                                WHEN mul_end1   =>              -- mulu
                                WHEN mul_end1   =>              -- mulu
                                        IF opcode(15)='0' THEN
                                        IF opcode(15)='0' THEN
                                                set(save_OP2) <= '1';
                                                set(hold_OP2) <= '1';
                                        END IF;
                                        END IF;
                                        datatype <= "10";
                                        datatype <= "10";
                                        set(opcMULU) <= '1';
                                        set(opcMULU) <= '1';
                                        IF opcode(15)='0' AND (MUL_Mode=1 OR MUL_Mode=2) THEN
                                        IF opcode(15)='0' AND (MUL_Mode=1 OR MUL_Mode=2) THEN
                                                dest_2ndHbits <= '1';
                                                dest_2ndHbits <= '1';

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