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[/] [theia_gpu/] [branches/] [icarus_version/] [rtl/] [Module_ControlRegister.v] - Diff between revs 158 and 166

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`timescale 1ns / 1ps
 
`include "aDefinitions.v"
 
 
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//-------------------------------------------------------------------
 
module ControlRegister
 
(
 
        input wire Clock,
 
        input wire Reset,
 
        input wire[15:0] iControlRegister,
 
        output wire[15:0] oControlRegister
 
);
 
 
 
reg [15:0] rControlRegister;
 
 
 
assign oControlRegister = rControlRegister;
 
 
 
always @ (posedge Clock)
 
begin
 
        if ( Reset )
 
                rControlRegister <= 16'b0;
 
        else
 
        begin
 
                rControlRegister <= iControlRegister;
 
        end
 
end
 
 
 
endmodule
 
//-------------------------------------------------------------------
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