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https://opencores.org/ocsvn/theia_gpu/theia_gpu/trunk
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| Rev 175 |
Rev 178 |
| Line 91... |
Line 91... |
wire wOperationIsJump;
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wire wOperationIsJump;
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assign wOperationIsJump = iBranchTaken || iBranchNotTaken;
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assign wOperationIsJump = iBranchTaken || iBranchNotTaken;
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//Don't allow me to write back back if the operation is a NOP
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//Don't allow me to write back back if the operation is a NOP
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`ifdef DEBUG
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`ifdef DEBUG
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assign oRAMWriteEnable = iALUOutputReady && !wOperationIsJump &&
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assign oRAMWriteEnable = iALUOutputReady && (!wOperationIsJump || oALUOperation == `RET ) &&
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(oALUOperation != `NOP) && oALUOperation != `DEBUG_PRINT;
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(oALUOperation != `NOP) && oALUOperation != `DEBUG_PRINT;
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`else
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`else
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assign oRAMWriteEnable = iALUOutputReady && !wOperationIsJump && oALUOperation != `NOP;
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assign oRAMWriteEnable = iALUOutputReady && (!wOperationIsJump || oALUOperation == `RET) && oALUOperation != `NOP;
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`endif
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`endif
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assign RAMBus = ( oRAMWriteEnable ) ? {iALUResultX,iALUResultY,iALUResultZ} : `DATA_ROW_WIDTH'bz;
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assign RAMBus = ( oRAMWriteEnable ) ? {iALUResultX,iALUResultY,iALUResultZ} : `DATA_ROW_WIDTH'bz;
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| Line 358... |
Line 358... |
`SWIZZLE3D: `LOGME"SWIZZLE3D");
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`SWIZZLE3D: `LOGME"SWIZZLE3D");
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`MULP: `LOGME"MULP");
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`MULP: `LOGME"MULP");
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`XCHANGEX: `LOGME"XCHANGEX");
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`XCHANGEX: `LOGME"XCHANGEX");
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`IMUL: `LOGME"IMUL");
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`IMUL: `LOGME"IMUL");
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`UNSCALE: `LOGME"UNSCALE");
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`UNSCALE: `LOGME"UNSCALE");
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`RESCALE: `LOGME"UNSCALE");
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`INCX: `LOGME"INCX");
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`INCX: `LOGME"INCX");
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`INCY: `LOGME"INCY");
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`INCY: `LOGME"INCY");
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`INCZ: `LOGME"INCZ");
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`INCZ: `LOGME"INCZ");
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`OMWRITE: `LOGME"OMWRITE");
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`OMWRITE: `LOGME"OMWRITE");
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`TMREAD: `LOGME"TMREAD");
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`TMREAD: `LOGME"TMREAD");
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