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[/] [theia_gpu/] [branches/] [icarus_version/] [rtl/] [Module_Host.v] - Diff between revs 176 and 178

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Rev 176 Rev 178
Line 59... Line 59... 
`define HOST_PREPARE_FOR_GEO_REQUESTS   14
 
`define HOST_PREPARE_FOR_GEO_REQUESTS   14
 
`define HOST_ACK_GEO_REQUEST            15
 
`define HOST_ACK_GEO_REQUEST            15
 
`define HOST_GET_PRIMITIVE_COUNT    16
 
`define HOST_GET_PRIMITIVE_COUNT    16
 
`define HOST_LAST_PRIMITIVE_REACHED 17
 
`define HOST_LAST_PRIMITIVE_REACHED 17
 
`define HOST_GPU_EXECUTION_DONE 18
 
`define HOST_GPU_EXECUTION_DONE 18
 
 
 
`define HOST_PREPARE_BROADCAST_CREG_MAX_PRIMITIVES  19
 
 
 
`define HOST_BROADCAST_CREG_MAX_PRIMITIVES    20
 
 
 
`define HOST_WAIT_CREG_MAX_PRIMITIVES     21
 
 
 
 
 
//---------------------------------------------------------------
 
//---------------------------------------------------------------
 
module Module_Host
 
module Module_Host
 
(
 
(
 
 input wire                 Clock,
 
 input wire                 Clock,
Line 91... Line 94... 
 input  wire                      GRDY_I, //This means all the cores are done rading the primitive we send
 
 input  wire                      GRDY_I, //This means all the cores are done rading the primitive we send
 
 output reg                       GACK_O, //We set this to ACK that the cored read the primitive
 
 output reg                       GACK_O, //We set this to ACK that the cored read the primitive
 
 output wire                      STDONE_O,
 
 output wire                      STDONE_O,
 
 output reg                       oHostDataAvailable,
 
 output reg                       oHostDataAvailable,
 
 input wire                       iGPUDone,
 
 input wire                       iGPUDone,
 
 `ifndef NO_DISPLAY_STATS
 
 output reg                       oRenderDone,
 
 input wire [`WIDTH-1:0] iDebugWidth,
 
 
 
 `endif
 
 input wire [`WIDTH-1:0] iWidth,iHeight,
 
 
 
 
 
 
 
 
 
 input wire                       ACK_I
 
 input wire                       ACK_I
 
);
 
);
 
wire wGPUDone;
 
wire wGPUDone;
 
 
 
 
Line 245... Line 249... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if ( ~Reset & iEnable )
 
   if ( ~Reset & iEnable )
 
   begin
 
   begin
 
    $display("-I- HOST: Broadcasting User code to all Cores\n");
 
    $display("-I- HOST: Broadcasting User code to all Cores\n");
 
    `ifndef VERILATOR
 
    `ifndef VERILATOR
Line 280... Line 285... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
   oRenderDone           = 0;
 
 
 
 
 
   rHostNextState = `HOST_WAIT_INSTRUCTION;
 
   rHostNextState = `HOST_WAIT_INSTRUCTION;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  `HOST_WAIT_INSTRUCTION:
 
  `HOST_WAIT_INSTRUCTION:
Line 301... Line 307... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if ( wWBMDone && ~wLastValidReadAddress )
 
   if ( wWBMDone && ~wLastValidReadAddress )
 
    rHostNextState = `HOST_WRITE_INSTRUCTION;
 
    rHostNextState = `HOST_WRITE_INSTRUCTION;
 
   else if (wWBMDone && wLastValidReadAddress )
 
   else if (wWBMDone && wLastValidReadAddress )
 
    rHostNextState = `HOST_INITIAL_SCENE_PARAMS_STAGE;
 
    rHostNextState = `HOST_INITIAL_SCENE_PARAMS_STAGE;
Line 331... Line 338... 
   rIncCoreSelect        = 0;                       //Set to unicast to the next core
 
   rIncCoreSelect        = 0;                       //Set to unicast to the next core
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   $display("-I- HOST: Configuring Core Mask %b\n",oCoreSelectMask);
 
   $display("-I- HOST: Configuring Core Mask %b\n",oCoreSelectMask);
 
   `ifndef VERILATOR
 
   `ifndef VERILATOR
 
   $fflush;
 
   $fflush;
 
   `endif
 
   `endif
Line 360... Line 368... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   rHostNextState = `HOST_WAIT_SCENE_PARAMS;
 
   rHostNextState = `HOST_WAIT_SCENE_PARAMS;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  `HOST_WAIT_SCENE_PARAMS:
 
  `HOST_WAIT_SCENE_PARAMS:
Line 380... Line 389... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if ( wWBMDone && ~wLastParameter )
 
   if ( wWBMDone && ~wLastParameter )
 
    rHostNextState = `HOST_WRITE_SCENE_PARAMS;
 
    rHostNextState = `HOST_WRITE_SCENE_PARAMS;
 
   else if (wWBMDone && wLastParameter )
 
   else if (wWBMDone && wLastParameter )
 
    rHostNextState = `HOST_PREPARE_CORE_CONFIG;
 
    rHostNextState = `HOST_PREPARE_CORE_CONFIG;
Line 411... Line 421... 
   rIncCoreSelect        = 0;                                       //Set to unicast to the next core
 
   rIncCoreSelect        = 0;                                       //Set to unicast to the next core
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
   rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
   rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
  end
 
  end
 
 
 
 
Line 434... Line 445... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   rHostNextState = `HOST_WAIT_CORE_CONFIG;
 
   rHostNextState = `HOST_WAIT_CORE_CONFIG;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  `HOST_WAIT_CORE_CONFIG:
 
  `HOST_WAIT_CORE_CONFIG:
Line 455... Line 467... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
   if (wWBMDone && ((oReadAddress % 2) == `WB_WIDTH'b0))
 
   if (wWBMDone && ((oReadAddress % 2) == `WB_WIDTH'b0))
 
    rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
    rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
   else if (wWBMDone && ((oReadAddress % 2) != `WB_WIDTH'b0))
 
   else if (wWBMDone && ((oReadAddress % 2) != `WB_WIDTH'b0))
Line 486... Line 499... 
   rIncCoreSelect        = 1;                                       //Moving to configure the next core now
 
   rIncCoreSelect        = 1;                                       //Moving to configure the next core now
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if (wLastCoreSelected)//wCoreSelect[`MAX_CORES-1] == 1)
 
   if (wLastCoreSelected)
 
    rHostNextState = `HOST_PREPARE_FOR_GEO_REQUESTS;
 
    rHostNextState = `HOST_PREPARE_BROADCAST_CREG_MAX_PRIMITIVES;
 
   else
 
   else
 
    rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
    rHostNextState = `HOST_UNICAST_CORE_CONFIG;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
 
 
  `HOST_PREPARE_BROADCAST_CREG_MAX_PRIMITIVES:
 
 
 
  begin
 
 
 
   rWBMEnable            = 0;                                       //Do not enable until we are resquested
 
 
 
   rInitiaReadAddr       = 32'd6;                                                                                         //Start reading from here, it has the # of primites
 
 
 
   rWBMReset             = 1;                                       //Tell WBM to start reading from the addr bellow
 
 
 
   oMemSelect            = `SELECT_GEO_MEM;                         //We are reading from the geometry memory
 
 
 
   TGA_O                 = `TAG_DATA_ADDRESS_TYPE;                  //We will write to the DATA section of the core MEM
 
 
 
   MST_O                 = 0;                                       //Keep master signal in 0 for now
 
 
 
   rInitialWriteAddress  = {16'b0,`CREG_MAX_PRIMITIVES};            //The address from which to start wrting @ the cores
 
 
 
   rSetWriteAddr         = 1;                                       //Set to use the initial write address bellow
 
 
 
   oCoreSelectMask       = `SELECT_ALL_CORES;
 
 
 
   rIncCoreSelect        = 0;                                       //Set to unicast to the next core
 
 
 
   RENDREN_O             = 0;
 
 
 
   rResetVertexCount     = 0;
 
 
 
   GACK_O                = 0;
 
 
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
 
 
   rHostNextState = `HOST_BROADCAST_CREG_MAX_PRIMITIVES;
 
 
 
        end
 
 
 
        //----------------------------------------
 
 
 
        `HOST_BROADCAST_CREG_MAX_PRIMITIVES:
 
 
 
        begin
 
 
 
        rWBMEnable            = 1;
 
 
 
   rInitiaReadAddr       = 0;
 
 
 
   rWBMReset             = 0;
 
 
 
   oMemSelect            = `SELECT_GEO_MEM;
 
 
 
   TGA_O                 = `TAG_DATA_ADDRESS_TYPE;
 
 
 
   MST_O                 = 1;
 
 
 
   rInitialWriteAddress  = 0;
 
 
 
   rSetWriteAddr         = 0;
 
 
 
   oCoreSelectMask       = `SELECT_ALL_CORES;
 
 
 
   rIncCoreSelect        = 0;
 
 
 
   RENDREN_O             = 0;
 
 
 
   rResetVertexCount     = 0;
 
 
 
   GACK_O                = 0;
 
 
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
   rHostNextState = `HOST_WAIT_CREG_MAX_PRIMITIVES;
 
 
 
  end
 
 
 
  //----------------------------------------
 
 
 
  `HOST_WAIT_CREG_MAX_PRIMITIVES:
 
 
 
  begin
 
 
 
   rWBMEnable            = ~wWBMDone;
 
 
 
   rInitiaReadAddr       = 0;
 
 
 
   rWBMReset             = 0;
 
 
 
   oMemSelect            = `SELECT_GEO_MEM;
 
 
 
   TGA_O                 = `TAG_DATA_ADDRESS_TYPE;
 
 
 
   MST_O                 = 1;
 
 
 
   rInitialWriteAddress  = 0;
 
 
 
   rSetWriteAddr         = 0;
 
 
 
   oCoreSelectMask       = `SELECT_ALL_CORES;
 
 
 
   rIncCoreSelect        = 0;
 
 
 
   RENDREN_O             = 0;
 
 
 
   rResetVertexCount     = 0;
 
 
 
   GACK_O                = 0;
 
 
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
 
 
   if (wWBMDone )
 
 
 
         rHostNextState = `HOST_PREPARE_FOR_GEO_REQUESTS;
 
 
 
   else
 
 
 
    rHostNextState = `HOST_WAIT_CREG_MAX_PRIMITIVES;
 
 
 
 
 
 
 
  end
 
 
 
  //----------------------------------------
 
  /*
 
  /*
 
   Prepare the write address for the next primitive.
 
   Prepare the write address for the next primitive.
 
 
 
 
 
  */
 
  */
 
  `HOST_PREPARE_FOR_GEO_REQUESTS:
 
  `HOST_PREPARE_FOR_GEO_REQUESTS:
Line 513... Line 596... 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 1;
 
   rResetVertexCount     = 1;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if (wGPUDone)
 
   if (RenderedPixels >= (iWidth*iHeight))//(wGPUDone)
 
    rHostNextState = `HOST_GPU_EXECUTION_DONE;
 
    rHostNextState = `HOST_GPU_EXECUTION_DONE;
 
   else
 
   else
 
    rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
    rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
 
 
 
 
  end
 
  end
Line 537... Line 621... 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 1;
 
   GACK_O                = 1;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
   rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
   rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
 
 
 
 
  end
 
  end
Line 564... Line 649... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   rHostNextState = `HOST_WAIT_FOR_VERTEX;
 
   rHostNextState = `HOST_WAIT_FOR_VERTEX;
 
 
 
 
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
Line 586... Line 672... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
   if (wWBMDone & ~wLastVertexInFrame )
 
   if (wWBMDone & ~wLastVertexInFrame )
 
    rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
    rHostNextState = `HOST_BROADCAST_NEXT_VERTEX;
 
   else if (wWBMDone & wLastVertexInFrame )
 
   else if (wWBMDone & wLastVertexInFrame )
Line 613... Line 700... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;//1;
 
   oHostDataAvailable    = 0;//1;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   if (wVertexCount >= iPrimitiveCount)
 
   if (wVertexCount >= iPrimitiveCount)
 
    rHostNextState = `HOST_LAST_PRIMITIVE_REACHED;
 
    rHostNextState = `HOST_LAST_PRIMITIVE_REACHED;
 
   else
 
   else
 
    rHostNextState = `HOST_WAIT_DATA_READ_CONFIRMATION;
 
    rHostNextState = `HOST_WAIT_DATA_READ_CONFIRMATION;
Line 642... Line 730... 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   rIncCoreSelect        = 0;                      //Ignored during broadcasts 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
    oHostDataAvailable   = 1;
 
    oHostDataAvailable   = 1;
 
 
 
         oRenderDone           = 0;
 
 
 
 
 
   if ( iHostDataReadConfirmed )
 
   if ( iHostDataReadConfirmed )
 
    rHostNextState = `HOST_ACK_GEO_REQUEST;
 
    rHostNextState = `HOST_ACK_GEO_REQUEST;
 
   else
 
   else
 
    rHostNextState = `HOST_WAIT_DATA_READ_CONFIRMATION;
 
    rHostNextState = `HOST_WAIT_DATA_READ_CONFIRMATION;
Line 665... Line 754... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   RENDREN_O             = `SELECT_ALL_CORES;
 
   rResetVertexCount     = 0;                  //Reset the vertex count to zero
 
   rResetVertexCount     = 0;                  //Reset the vertex count to zero
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
   if (iGPUCommitedResults)
 
   if (iGPUCommitedResults)
 
   begin
 
   begin
Line 682... Line 772... 
    `endif
 
    `endif
 
   end
 
   end
 
 
 
 
 
    RenderedPixels = RenderedPixels + `MAX_CORES;
 
    RenderedPixels = RenderedPixels + `MAX_CORES;
 
        /* verilator lint_off WIDTH */
 
        /* verilator lint_off WIDTH */
 
    if ( RenderedPixels % iDebugWidth == 0)
 
    if ( RenderedPixels % iWidth == 0)
 
        begin
 
        begin
 
 
 
 
 
     $write("]%d\n[",RenderedPixels / iDebugWidth);
 
     $write("]%d\n[",RenderedPixels / iWidth);
 
 
 
 
 
                 `ifndef VERILATOR
 
                 `ifndef VERILATOR
 
                 $fflush;
 
                 $fflush;
 
                 `endif
 
                 `endif
 
        end
 
        end
Line 704... Line 794... 
    rHostNextState = `HOST_LAST_PRIMITIVE_REACHED;
 
    rHostNextState = `HOST_LAST_PRIMITIVE_REACHED;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  `HOST_GPU_EXECUTION_DONE:
 
  `HOST_GPU_EXECUTION_DONE:
 
  begin
 
  begin
 
   $display("THEIA Execution done in %xns\n",$time-StartTime);
 
   $display("THEIA Execution done in %dns\n",$time-StartTime);
 
   rWBMEnable            = 0;
 
   rWBMEnable            = 0;
 
   rInitiaReadAddr       = 0;
 
   rInitiaReadAddr       = 0;
 
   rWBMReset             = 0;
 
   rWBMReset             = 0;
 
   oMemSelect            = 0;
 
   oMemSelect            = 0;
 
   TGA_O                 = 0;
 
   TGA_O                 = 0;
Line 719... Line 809... 
   rIncCoreSelect        = 0;
 
   rIncCoreSelect        = 0;
 
   RENDREN_O             = 0;
 
   RENDREN_O             = 0;
 
   rResetVertexCount     = 0;
 
   rResetVertexCount     = 0;
 
   GACK_O                = 0;
 
   GACK_O                = 0;
 
   oHostDataAvailable    = 0;
 
   oHostDataAvailable    = 0;
 
 
 
        oRenderDone           = 1;
 
 
 
 
 
   rHostNextState = `HOST_GPU_EXECUTION_DONE;
 
   rHostNextState = `HOST_GPU_EXECUTION_DONE;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  default:
 
  default:
Line 740... Line 831... 
   rIncCoreSelect         = 0;
 
   rIncCoreSelect         = 0;
 
   RENDREN_O              = 0;
 
   RENDREN_O              = 0;
 
   rResetVertexCount      = 0;
 
   rResetVertexCount      = 0;
 
   GACK_O                 = 0;
 
   GACK_O                 = 0;
 
   oHostDataAvailable     = 0;
 
   oHostDataAvailable     = 0;
 
 
 
        oRenderDone           = 0;
 
 
 
 
 
   rHostNextState = `HOST_IDLE;
 
   rHostNextState = `HOST_IDLE;
 
  end
 
  end
 
  //----------------------------------------
 
  //----------------------------------------
 
  endcase
 
  endcase

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