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[/] [theia_gpu/] [branches/] [icarus_version/] [rtl/] [Module_InstructionDecode.v] - Diff between revs 166 and 175

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Rev 166 Rev 175
Line 38... Line 38...
`ifdef DEBUG
`ifdef DEBUG
        input wire [`ROM_ADDRESS_WIDTH-1:0] iDebug_CurrentIP,
        input wire [`ROM_ADDRESS_WIDTH-1:0] iDebug_CurrentIP,
        output wire [`ROM_ADDRESS_WIDTH-1:0] oDebug_CurrentIP,
        output wire [`ROM_ADDRESS_WIDTH-1:0] oDebug_CurrentIP,
`endif
`endif
 
 
//input wire   [`ROM_ADDRESS_WIDTH-1:0]    iIP,
 
//output reg  [`ROM_ADDRESS_WIDTH-1:0]     oReturnAddress,
 
output wire                               oDataReadyForExe
output wire                               oDataReadyForExe
 
 
);
);
wire wInmediateOperand;
wire wInmediateOperand;
wire [`DATA_ROW_WIDTH-1:0]       wSource0,wSource1;
wire [`DATA_ROW_WIDTH-1:0]       wSource0,wSource1;
Line 93... Line 92...
        .Enable(1'b1),
        .Enable(1'b1),
        .D( iInstructionAvailable ),
        .D( iInstructionAvailable ),
        .Q( oDataReadyForExe )
        .Q( oDataReadyForExe )
);
);
 
 
/*
 
wire IsCall;
 
assign IsCall = ( oOperation == `CALL ) ? 1'b1 : 1'b0;
 
always @ (posedge IsCall)
 
oReturnAddress <= iIP;
 
*/
 
/*
 
FFD_POSEDGE_SYNCRONOUS_RESET # ( `ROM_ADDRESS_WIDTH ) FFRETURNADDR
 
(
 
        .Clock( Clock ),
 
        .Reset( Reset ),
 
        .Enable( IsCall ),
 
        .D( iIP ),
 
        .Q( oReturnAddress )
 
);
 
*/
 
 
 
 
 
//Latch the Operation
//Latch the Operation
FFD_POSEDGE_SYNCRONOUS_RESET # ( `INSTRUCTION_OP_LENGTH ) FFD3
FFD_POSEDGE_SYNCRONOUS_RESET # ( `INSTRUCTION_OP_LENGTH ) FFD3
(
(
        .Clock(Clock),
        .Clock(Clock),

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