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[/] [theia_gpu/] [branches/] [icarus_version/] [rtl/] [Unit_EXE.v] - Diff between revs 174 and 175

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Rev 174 Rev 175
Line 34... Line 34...
input wire                             Clock,
input wire                             Clock,
input wire                             Reset,
input wire                             Reset,
input wire [`ROM_ADDRESS_WIDTH-1:0]         iInitialCodeAddress,
input wire [`ROM_ADDRESS_WIDTH-1:0]         iInitialCodeAddress,
input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction1,
input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction1,
input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction2,
input wire [`INSTRUCTION_WIDTH-1:0]      iInstruction2,
 
 
 
 
input wire [`DATA_ROW_WIDTH-1:0]                 iDataRead0,
input wire [`DATA_ROW_WIDTH-1:0]                 iDataRead0,
input wire [`DATA_ROW_WIDTH-1:0]       iDataRead1,
input wire [`DATA_ROW_WIDTH-1:0]       iDataRead1,
input wire                             iTrigger,
input wire                             iTrigger,
 
 
 
 
output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer1,
output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer1,
output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer2,
output wire [`ROM_ADDRESS_WIDTH-1:0]     oInstructionPointer2,
output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataReadAddress0,
output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataReadAddress0,
output wire [`DATA_ADDRESS_WIDTH-1:0]  oDataReadAddress1,
output wire [`DATA_ADDRESS_WIDTH-1:0]  oDataReadAddress1,
output wire                                                                     oDataWriteEnable,
output wire                                                                     oDataWriteEnable,
output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataWriteAddress,
output wire [`DATA_ADDRESS_WIDTH-1:0]    oDataWriteAddress,
output wire [`DATA_ROW_WIDTH-1:0]                oDataBus,
output wire [`DATA_ROW_WIDTH-1:0]                oDataBus,
output wire                            oReturnCode,
output wire                            oReturnCode,
 
 
 
 
output wire [`DATA_ROW_WIDTH-1:0]    oOMEMWriteAddress,
output wire [`DATA_ROW_WIDTH-1:0]    oOMEMWriteAddress,
output wire [`DATA_ROW_WIDTH-1:0]    oOMEMWriteData,
output wire [`DATA_ROW_WIDTH-1:0]    oOMEMWriteData,
output wire                                 oOMEMWriteEnable,
output wire                                 oOMEMWriteEnable,
output wire [`DATA_ROW_WIDTH-1:0]    oTMEMReadAddress,
output wire [`DATA_ROW_WIDTH-1:0]    oTMEMReadAddress,
input wire [`DATA_ROW_WIDTH-1:0]     iTMEMReadData,
input wire [`DATA_ROW_WIDTH-1:0]     iTMEMReadData,
Line 73... Line 67...
 
 
 
 
`ifdef DEBUG
`ifdef DEBUG
        wire [`ROM_ADDRESS_WIDTH-1:0] wDEBUG_IDU2_EXE_InstructionPointer;
        wire [`ROM_ADDRESS_WIDTH-1:0] wDEBUG_IDU2_EXE_InstructionPointer;
`endif
`endif
 
 
wire                                                                            wEXE2__uCodeDone;
wire                                                                            wEXE2__uCodeDone;
wire                                                                            wEXE2_IFU__EXEBusy;
wire                                                                            wEXE2_IFU__EXEBusy;
wire [`DATA_ADDRESS_WIDTH-1:0]   wEXE2_IDU_DataFordward_LastDestination;
wire [`DATA_ADDRESS_WIDTH-1:0]   wEXE2_IDU_DataFordward_LastDestination;
wire                                                                            wALU2_EXE__BranchTaken;
wire                                                                            wALU2_EXE__BranchTaken;
wire                                                                            wALU2_IFU_BranchNotTaken;
wire                                                                            wALU2_IFU_BranchNotTaken;
wire [`INSTRUCTION_WIDTH-1:0]    CurrentInstruction;
wire [`INSTRUCTION_WIDTH-1:0]     wCurrentInstruction;
//wire                                                                          wIDU2_IFU__IDUBusy;
 
 
 
/* verilator lint_off UNOPTFLAT*/
/* verilator lint_off UNOPTFLAT*/
wire [`INSTRUCTION_OP_LENGTH-1:0]                                wOperation /* verilator isolate_assignments*/;
wire [`INSTRUCTION_OP_LENGTH-1:0] wOperation;
/* verilator lint_on UNOPTFLAT*/
/* verilator lint_on UNOPTFLAT*/
 
 
wire [`DATA_ROW_WIDTH-1:0] wSource0,wSource1;
wire [`DATA_ROW_WIDTH-1:0] wSource0,wSource1;
wire [`DATA_ADDRESS_WIDTH-1:0] wDestination;
wire [`DATA_ADDRESS_WIDTH-1:0] wDestination;
wire wInstructionAvailable;
wire wInstructionAvailable;
 
 
//ALU wires
//ALU wires
Line 142... Line 132...
.iInstruction2(         iInstruction2          ),
.iInstruction2(         iInstruction2          ),
.iInitialCodeAddress(   wCodeEntryPoint        ),
.iInitialCodeAddress(   wCodeEntryPoint        ),
.iBranchTaken(          w2FIU__BranchTaken     ),
.iBranchTaken(          w2FIU__BranchTaken     ),
.iSubroutineReturn(     wALU2_IFU_ReturnFromSub ),
.iSubroutineReturn(     wALU2_IFU_ReturnFromSub ),
//.iReturnAddress(        wIDU2_IFU_ReturnAddress ),
//.iReturnAddress(        wIDU2_IFU_ReturnAddress ),
.oCurrentInstruction(   CurrentInstruction      ),
.oCurrentInstruction(   wCurrentInstruction      ),
.oInstructionAvalable(  wInstructionAvailable   ),
.oInstructionAvalable(  wInstructionAvailable   ),
.oIP(                   wIFU_IP                 ),
.oIP(                   wIFU_IP                 ),
.oIP2(                  oInstructionPointer2    ),
.oIP2(                  oInstructionPointer2    ),
.iEXEDone(              ALU2OutputReady         ),
.iEXEDone(              ALU2OutputReady         ),
.oMicroCodeReturnValue( oReturnCode             ),
.oMicroCodeReturnValue( oReturnCode             ),
Line 159... Line 149...
 
 
InstructionDecode IDU
InstructionDecode IDU
(
(
        .Clock( Clock ),
        .Clock( Clock ),
        .Reset( Reset ),
        .Reset( Reset ),
        .iEncodedInstruction( CurrentInstruction ),
 .iEncodedInstruction( wCurrentInstruction ),
        .iInstructionAvailable( wInstructionAvailable ),
        .iInstructionAvailable( wInstructionAvailable ),
        //.iIP( oInstructionPointer1 ),
        //.iIP( oInstructionPointer1 ),
        //.oReturnAddress( wIDU2_IFU_ReturnAddress ),
        //.oReturnAddress( wIDU2_IFU_ReturnAddress ),
 
 
        .oRamAddress0( oDataReadAddress0 ),
        .oRamAddress0( oDataReadAddress0 ),

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