| Line 3... |
Line 3... |
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# testbench path TESTBENCH is passed from the command line
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# testbench path TESTBENCH is passed from the command line
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SCENEPATH =
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SCENEPATH =
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TESTBENCH = TestBench_THEIA
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TESTBENCH = TestBench_THEIA
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TESTBENCHPATH = ../testbench/${TESTBENCH}$(VERILOGEX)
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TESTBENCHPATH = ../testbench/${TESTBENCH}$(VERILOGEX)
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SOURCEPATH = ../src
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SOURCEPATH = ../rtl
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GPUCONFIGURATIONSCRIPT=../scripts/configure_gpu.pl
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INPUTCONFIGURATIONSCRIPT=../scripts/configure_params.pl
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#iverilog CONFIG
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#iverilog CONFIG
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VERILOG_CMD = iverilog
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VERILOG_CMD = iverilog
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GPUCORES = 4
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#VERILOG_FLAGS =
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#VERILOG_FLAGS =
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# VVP (iverilog runtime engine)
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# VVP (iverilog runtime engine)
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VVP_CMD = vvp
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VVP_CMD = vvp
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#VVP_FLAGS =
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#VVP_FLAGS =
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#Simulation Vars
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#Simulation Vars
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SIMDIR = .
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SIMDIR = .
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DUMPTYPE = none
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DUMPTYPE = none
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DEBUG_CORE_ID =
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DEBUG_CORE_ID =
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SCENEPATH =
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#Viewer
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#Viewer
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WAVEFORM_VIEWER = gtkwave # Waveform viewer executable
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WAVEFORM_VIEWER = gtkwave # Waveform viewer executable
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all: compile run view
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all: compile run view
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Line 37... |
testbench_check:
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testbench_check:
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ifeq ($(strip $(TESTBENCH)),)
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ifeq ($(strip $(TESTBENCH)),)
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@echo "TESTBENCH not set. Use TESTBENCH=value to set it."
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@echo "TESTBENCH not set. Use TESTBENCH=value to set it."
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@exit 2
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@exit 2
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endif
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endif
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ifeq ($(strip $(SCENEPATH)),)
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@echo "SCENEPATH not set. Use SCENEPATH=value to set it"
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@exit 2
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endif
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check: file_check
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check: file_check
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$(VERILOG_CMD) -t null $(FILES)
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$(VERILOG_CMD) -t null $(FILES)
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# Setup up project directory
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# Setup up project directory
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new :
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new :
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echo "Setting up project ${PROJECT}"
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echo "Setting up project ${PROJECT}"
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mkdir src testbench simulation
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mkdir rtl testbench simulation
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compile : testbench_check
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compile : testbench_check
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perl $(GPUCONFIGURATIONSCRIPT) $(GPUCORES)
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cp $(SOURCEPATH)/aDefinitions.v .
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cp $(SOURCEPATH)/aDefinitions.v .
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ifeq ($(strip $(DEBUG_CORE_ID)),)
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ifeq ($(strip $(DEBUG_CORE_ID)),)
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$(VERILOG_CMD) -o $(SIMDIR)/$(TESTBENCH) $(TESTBENCHPATH) $(SOURCEPATH)/*
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$(VERILOG_CMD) -o $(SIMDIR)/$(TESTBENCH) $(TESTBENCHPATH) $(SOURCEPATH)/*
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else
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else
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$(VERILOG_CMD) -DDEBUG=1 -DDUMP_CODE=1 -DDEBUG_CORE=$(DEBUG_CORE_ID) -o $(SIMDIR)/$(TESTBENCH) $(TESTBENCHPATH) $(SOURCEPATH)/*
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$(VERILOG_CMD) -DDEBUG=1 -DDUMP_CODE=1 -DDEBUG_CORE=$(DEBUG_CORE_ID) -o $(SIMDIR)/$(TESTBENCH) $(TESTBENCHPATH) $(SOURCEPATH)/*
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endif
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endif
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rm -f aDefinitions.v
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rm -f aDefinitions.v
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run : testbench_check
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run : testbench_check
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cp $(SCENEPATH)/*.mem .
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perl $(INPUTCONFIGURATIONSCRIPT) $(GPUCORES)
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$(VVP_CMD) ./$(TESTBENCH) -$(DUMPTYPE) $(VVP_FLAGS)
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$(VVP_CMD) ./$(TESTBENCH) -$(DUMPTYPE) $(VVP_FLAGS)
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view : testbench_check
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view : testbench_check
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$(WAVEFORM_VIEWER) $(SIMDIR)/$(TESTBENCH).$(DUMPTYPE)
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$(WAVEFORM_VIEWER) $(SIMDIR)/$(TESTBENCH).$(DUMPTYPE)
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