URL https://opencores.org/ocsvn/theia_gpu/theia_gpu/trunk

Subversion Repositories theia_gpu

[/] [theia_gpu/] [branches/] [icarus_version/] [simulation/] [Makefile] - Diff between revs 170 and 172

Rev 170	Rev 172
Line 1...	Line 1...

`VERILOGEX = .v # Verilog file extension`	`VERILOGEX = .v # Verilog file extension`

`# testbench path TESTBENCH is passed from the command line`	`# testbench path TESTBENCH is passed from the command line`
`SCENEPATH =`	`SCENEPATH =`
`TESTBENCH = TestBench_THEIA`	`TESTBENCH = TestBench_verilog`
`TESTBENCHPATH = ../testbench/${TESTBENCH}$(VERILOGEX)`	`TESTBENCHPATH = ../testbench/${TESTBENCH}$(VERILOGEX)`
`SOURCEPATH = ../rtl`	`SOURCEPATH = ../rtl`
`GPUCONFIGURATIONSCRIPT=../scripts/configure_gpu.pl`	`GPUCONFIGURATIONSCRIPT=../scripts/configure_gpu.pl`
`INPUTCONFIGURATIONSCRIPT=../scripts/configure_params.pl`	`INPUTCONFIGURATIONSCRIPT=../scripts/configure_params.pl`
`#iverilog CONFIG`	`#iverilog CONFIG`
Line 40...	Line 40...
`@exit 2`	`@exit 2`
`endif`	`endif`



`check: file_check`	`check:`
`$(VERILOG_CMD) -t null $(FILES)`	`$(VERILOG_CMD) -t null $(FILES)`

`# Setup up project directory`	`# Setup up project directory`
`new :`	`new :`
`echo "Setting up project ${PROJECT}"`	`echo "Setting up project ${PROJECT}"`
Line 72...	Line 72...
`$(VVP_CMD) ./$(TESTBENCH) -$(DUMPTYPE) $(VVP_FLAGS)`	`$(VVP_CMD) ./$(TESTBENCH) -$(DUMPTYPE) $(VVP_FLAGS)`

`view : testbench_check`	`view : testbench_check`
`$(WAVEFORM_VIEWER) $(SIMDIR)/$(TESTBENCH).$(DUMPTYPE)`	`$(WAVEFORM_VIEWER) $(SIMDIR)/$(TESTBENCH).$(DUMPTYPE)`

`clean : test_bench_check`	`clean :`
`rm $(SIM_DIR)/$(TESTBENCH)*`	`rm -f *.mem`
	`rm -f *.ppm`
	`rm -f *.log`