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[/] [theia_gpu/] [branches/] [icarus_version/] [testbench/] [TestBench_verilog.v] - Diff between revs 179 and 186

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Rev 179 Rev 186
Line 237... Line 237...
 
 
  $display("Control Register : %b",rControlRegister[0]);
  $display("Control Register : %b",rControlRegister[0]);
  $display("Resolution       : %d X %d",`RESOLUTION_WIDTH, `RESOLUTION_HEIGHT );
  $display("Resolution       : %d X %d",`RESOLUTION_WIDTH, `RESOLUTION_HEIGHT );
 
 
 
 
  log  = $fopen("Simulation.log");
 
  $fwrite(log, "Simulation start time : %dns\n",$time);
 
  $fwrite(log, "Width : %d\n",`RESOLUTION_WIDTH);
 
  $fwrite(log, "Height : %d\n",`RESOLUTION_HEIGHT);
 
 
 
 
 
  //Open output file
  //Open output file
  out2 = $fopen("Output.ppm");
  out2 = $fopen("Output.ppm");
 
 
  $fwrite(out2,"P3\n");
  $fwrite(out2,"P3\n");
  $fwrite(out2,"#This file was generated by Theia's RTL simulation\n");
  $fwrite(out2,"#This file was generated by Theia's RTL simulation\n");
Line 279... Line 273...
  end
  end
  $display("\nDone Intilializing TMEM @ %dns",$time);
  $display("\nDone Intilializing TMEM @ %dns",$time);
  TMWE_O = 0;
  TMWE_O = 0;
  rHostEnable = 1;
  rHostEnable = 1;
 
 
 
  log  = $fopen("Simulation.log");
 
  $fwrite(log, "Simulation start time : %dns\n",$time);
 
  $fwrite(log, "Width : %d\n",`RESOLUTION_WIDTH);
 
  $fwrite(log, "Height : %d\n",`RESOLUTION_HEIGHT);
 
 
  //Start dumping VCD
  //Start dumping VCD
  $display("-I- Starting VCD Dump\n");
  $display("-I- Starting VCD Dump\n");
 // $dumpfile("TestBench_Theia.vcd");
 // $dumpfile("TestBench_Theia.vcd");
 // $dumpvars(0,TestBench_Theia);
 // $dumpvars(0,TestBench_Theia);
 
 
 end
 end
 
 
 
 
endmodule
endmodule
 
 
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