| Line 26... |
Line 26... |
all over the code. By know you have may noticed that all
|
all over the code. By know you have may noticed that all
|
constants are pre-compilation define directives. This is
|
constants are pre-compilation define directives. This is
|
for simulation perfomance reasons mainly.
|
for simulation perfomance reasons mainly.
|
*******************************************************************************/
|
*******************************************************************************/
|
|
|
|
`define MAX_CORES 4
|
//---------------------------------------------------------------------------------
|
//---------------------------------------------------------------------------------
|
//Verilog provides a `default_nettype none compiler directive. When
|
//Verilog provides a `default_nettype none compiler directive. When
|
//this directive is set, implicit data types are disabled, which will make any
|
//this directive is set, implicit data types are disabled, which will make any
|
//undeclared signal name a syntax error.This is very usefull to avoid annoying
|
//undeclared signal name a syntax error.This is very usefull to avoid annoying
|
//automatic 1 bit long wire declaration where you don't want them to be!
|
//automatic 1 bit long wire declaration where you don't want them to be!
|
| Line 88... |
Line 88... |
//Please keep this syntax ENTRYPOINT_ADDR_* because the perl script that
|
//Please keep this syntax ENTRYPOINT_ADDR_* because the perl script that
|
//parses the user code expects this pattern in order to read in the tokens
|
//parses the user code expects this pattern in order to read in the tokens
|
|
|
//Internal Entry points (default ROM Address)
|
//Internal Entry points (default ROM Address)
|
`define ENTRYPOINT_ADRR_INITIAL `ROM_ADDRESS_WIDTH'd0 //0 - This should always be zero
|
`define ENTRYPOINT_ADRR_INITIAL `ROM_ADDRESS_WIDTH'd0 //0 - This should always be zero
|
`define ENTRYPOINT_ADRR_CPPU `ROM_ADDRESS_WIDTH'd14 //E
|
`define ENTRYPOINT_ADRR_CPPU `ROM_ADDRESS_WIDTH'd29 //E
|
`define ENTRYPOINT_ADRR_RGU `ROM_ADDRESS_WIDTH'd17 //11
|
`define ENTRYPOINT_ADRR_RGU `ROM_ADDRESS_WIDTH'd32 //11
|
`define ENTRYPOINT_ADRR_AABBIU `ROM_ADDRESS_WIDTH'd33 //21
|
`define ENTRYPOINT_ADRR_AABBIU `ROM_ADDRESS_WIDTH'd53 //21
|
`define ENTRYPOINT_ADRR_BIU `ROM_ADDRESS_WIDTH'd121 //79
|
`define ENTRYPOINT_ADRR_BIU `ROM_ADDRESS_WIDTH'd141 //79
|
`define ENTRYPOINT_ADRR_PSU `ROM_ADDRESS_WIDTH'd196 //C4
|
`define ENTRYPOINT_ADRR_PSU `ROM_ADDRESS_WIDTH'd216 //C4
|
`define ENTRYPOINT_ADRR_PSU2 `ROM_ADDRESS_WIDTH'd212 //D4
|
`define ENTRYPOINT_ADRR_PSU2 `ROM_ADDRESS_WIDTH'd232 //D4
|
`define ENTRYPOINT_ADRR_TCC `ROM_ADDRESS_WIDTH'd154 //9A
|
`define ENTRYPOINT_ADRR_TCC `ROM_ADDRESS_WIDTH'd174 //9A
|
`define ENTRYPOINT_ADRR_NPG `ROM_ADDRESS_WIDTH'd24 //18
|
`define ENTRYPOINT_ADRR_NPG `ROM_ADDRESS_WIDTH'd39 //18
|
//User Entry points (default ROM Address)
|
//User Entry points (default ROM Address)
|
`define ENTRYPOINT_ADRR_USERCONSTANTS `ROM_ADDRESS_WIDTH'd221 //DD
|
`define ENTRYPOINT_ADRR_USERCONSTANTS `ROM_ADDRESS_WIDTH'd241 //DD
|
`define ENTRYPOINT_ADRR_PIXELSHADER `ROM_ADDRESS_WIDTH'd223 //DF
|
`define ENTRYPOINT_ADRR_PIXELSHADER `ROM_ADDRESS_WIDTH'd243 //DF
|
|
|
//Please keep this syntax ENTRYPOINT_INDEX_* because the perl script that
|
//Please keep this syntax ENTRYPOINT_INDEX_* because the perl script that
|
//parses the user code expects this pattern in order to read in the tokens
|
//parses the user code expects this pattern in order to read in the tokens
|
//Internal subroutines
|
//Internal subroutines
|
`define ENTRYPOINT_INDEX_INITIAL `ROM_ADDRESS_WIDTH'h8000
|
`define ENTRYPOINT_INDEX_INITIAL `ROM_ADDRESS_WIDTH'h8000
|
| Line 148... |
Line 148... |
`define CREG_PROJECTION_WINDOW_MIN `DATA_ADDRESS_WIDTH'd2
|
`define CREG_PROJECTION_WINDOW_MIN `DATA_ADDRESS_WIDTH'd2
|
`define CREG_PROJECTION_WINDOW_MAX `DATA_ADDRESS_WIDTH'd3
|
`define CREG_PROJECTION_WINDOW_MAX `DATA_ADDRESS_WIDTH'd3
|
`define CREG_RESOLUTION `DATA_ADDRESS_WIDTH'd4
|
`define CREG_RESOLUTION `DATA_ADDRESS_WIDTH'd4
|
`define CREG_TEXTURE_SIZE `DATA_ADDRESS_WIDTH'd5
|
`define CREG_TEXTURE_SIZE `DATA_ADDRESS_WIDTH'd5
|
`define CREG_PIXEL_2D_INITIAL_POSITION `DATA_ADDRESS_WIDTH'd6
|
`define CREG_PIXEL_2D_INITIAL_POSITION `DATA_ADDRESS_WIDTH'd6
|
`define CREG_FIRST_LIGTH `DATA_ADDRESS_WIDTH'd7
|
`define CREG_PIXEL_2D_FINAL_POSITION `DATA_ADDRESS_WIDTH'd7
|
`define CREG_FIRST_LIGTH_DIFFUSE `DATA_ADDRESS_WIDTH'd7
|
`define CREG_FIRST_LIGTH `DATA_ADDRESS_WIDTH'd8
|
|
`define CREG_FIRST_LIGTH_DIFFUSE `DATA_ADDRESS_WIDTH'd8
|
//OK, so from address 0x06 to 0x0F is where the lights are,watch out values are harcoded
|
//OK, so from address 0x06 to 0x0F is where the lights are,watch out values are harcoded
|
//for now!! (look in ROM.v for hardcoded values!!!)
|
//for now!! (look in ROM.v for hardcoded values!!!)
|
|
|
|
|
//Don't change the order of the registers. CREG_V* and CREG_UV* registers
|
//Don't change the order of the registers. CREG_V* and CREG_UV* registers
|
| Line 226... |
Line 227... |
`define CREG_u `DATA_ADDRESS_WIDTH'd103
|
`define CREG_u `DATA_ADDRESS_WIDTH'd103
|
`define CREG_v `DATA_ADDRESS_WIDTH'd104
|
`define CREG_v `DATA_ADDRESS_WIDTH'd104
|
`define CREG_H1 `DATA_ADDRESS_WIDTH'd105
|
`define CREG_H1 `DATA_ADDRESS_WIDTH'd105
|
`define CREG_H2 `DATA_ADDRESS_WIDTH'd106
|
`define CREG_H2 `DATA_ADDRESS_WIDTH'd106
|
`define CREG_H3 `DATA_ADDRESS_WIDTH'd107
|
`define CREG_H3 `DATA_ADDRESS_WIDTH'd107
|
`define OREG_PIXEL_PITCH `DATA_ADDRESS_WIDTH'd108
|
`define CREG_PIXEL_PITCH `DATA_ADDRESS_WIDTH'd108
|
|
|
`define CREG_LAST_COL `DATA_ADDRESS_WIDTH'd109 //the last valid column, simply CREG_RESOLUTIONX - 1
|
`define CREG_LAST_COL `DATA_ADDRESS_WIDTH'd109 //the last valid column, simply CREG_RESOLUTIONX - 1
|
`define CREG_TEXTURE_COLOR `DATA_ADDRESS_WIDTH'd110
|
`define CREG_TEXTURE_COLOR `DATA_ADDRESS_WIDTH'd110
|
`define CREG_PIXEL_2D_POSITION `DATA_ADDRESS_WIDTH'd111
|
`define CREG_PIXEL_2D_POSITION `DATA_ADDRESS_WIDTH'd111
|
`define CREG_TEXWEIGHT1 `DATA_ADDRESS_WIDTH'd112
|
`define CREG_TEXWEIGHT1 `DATA_ADDRESS_WIDTH'd112
|
`define CREG_TEXWEIGHT2 `DATA_ADDRESS_WIDTH'd113
|
`define CREG_TEXWEIGHT2 `DATA_ADDRESS_WIDTH'd113
|
| Line 240... |
Line 242... |
//** Ouput registers **//
|
//** Ouput registers **//
|
|
|
`define OREG_PIXEL_COLOR `DATA_ADDRESS_WIDTH'd128
|
`define OREG_PIXEL_COLOR `DATA_ADDRESS_WIDTH'd128
|
`define OREG_TEX_COORD1 `DATA_ADDRESS_WIDTH'd129
|
`define OREG_TEX_COORD1 `DATA_ADDRESS_WIDTH'd129
|
`define OREG_TEX_COORD2 `DATA_ADDRESS_WIDTH'd130
|
`define OREG_TEX_COORD2 `DATA_ADDRESS_WIDTH'd130
|
|
`define OREG_ADDR_O `DATA_ADDRESS_WIDTH'd131
|
//-------------------------------------------------------------
|
//-------------------------------------------------------------
|
//*** Instruction Set ***
|
//*** Instruction Set ***
|
//The order of the instrucitons is important here!. Don't change
|
//The order of the instrucitons is important here!. Don't change
|
//it unles you know what you are doing. For example all the 'SET'
|
//it unles you know what you are doing. For example all the 'SET'
|
//family of instructions have the MSB bit in 1. This means that
|
//family of instructions have the MSB bit in 1. This means that
|
